• Title/Summary/Keyword: Silicon Nitride Etching

Search Result 59, Processing Time 0.026 seconds

Effect of Surface Pyramids Size on Mono Silicon Solar Cell Performance

  • Kim, Hyeon-Ho;Kim, Su-Min;Park, Seong-Eun;Kim, Seong-Tak;Gang, Byeong-Jun;Tak, Seong-Ju;Kim, Dong-Hwan
    • Proceedings of the Materials Research Society of Korea Conference
    • /
    • 2012.05a
    • /
    • pp.100.2-100.2
    • /
    • 2012
  • Surface texturing of crystalline silicon is carried out in alkaline solutions for anisotropic etching that leads to random pyramids of about $10{\mu}m$ in size. Recently textured pyramids size gradually reduced using new solution. In this paper, we investigated that texture pyramids size had an impact on emitter property and front electrode (Ag) contact. To make small (${\sim}3{\mu}m$) and large (${\sim}10{\mu}m$) pyramids size, texturing times control and one side texturing using a silicon nitride film were carried out. Then formation and quality of POCl3-diffused n+ emitter in furnace compare with small and large pyramids by using SEM images, simulation (SILVACO, Athena module) and emitter saturation current density (J0e). After metallization, Ag contact resistance was measured by transfer length method (TLM) pattern. And surface distributions of Ag crystallites were observed by SEM images. Also, performance of cell which is fabricated by screen-printed solar cells is compared by light I-V.

  • PDF

Contact block copolymer technique을 이용한 실리콘 나노-필라 구조체 제작방법

  • Kim, Du-San;Kim, Hwa-Seong;Park, Jin-U;Yun, Deok-Hyeon;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2015.08a
    • /
    • pp.189-189
    • /
    • 2015
  • Plasmonics, sensor, field effect transistors, solar cells 등 다양한 적용분야를 가지는 실리콘 구조체는 제작공정에 의해 전기적 및 광학적 특성이 달라지기 때문에 적합한 나노구조 제작방법이 요구되고 있다. 나노구조체 제작방법으로는 Photo lithography, Extreme ultraviolet lithography (EUV), Nano imprinting lithography (NIL), Block copolymer (BCP) 방식의 방법들이 연구되고 있으며, 특히 BCP는 direct self-assembly 특성을 가지고 있으며 가격적인 면에서도 큰 장점을 가진다. 하지만 BCP를 mask로 사용하여 식각공정을 진행할 경우 BCP가 버티지 못하고 변형되어 mask로서의 역할을 하지 못한다. 이러한 문제를 해결하기 위하여 본 논문에서는 BCP와 질화막을 이용한 double mask 방법을 사용하였다. 기판 위에 BCP를 self-assembly 시키고 mask로 사용하여 hole 부분으로 노출된 기판을 Ion gun을 통해 질화 시킨 후에 BCP를 제거한다. 기판 위에 hole 모양의 질화막 표면은 BCP와 다르게 etching 공정 중 변형되지 않는다. 이러한 질화막 표면을 mask로 사용하여 pillar pattern의 실리콘 나노구조체를 제작하였다. 질화막 mask로 사용되는 template은 PS와 PMMA로 구성된 BCP를 사용하였다. 140kg/mol의 polystyrene과 65kg/mol의 PMMA를 톨루엔으로 용해시키고 실리콘 표면 위에 spin coating으로 도포하였다. Spin coat 후 230도에서 40시간 동안 열처리를 진행하여 40nm의 직경을 가진 PS-b-PMMA self-assembled hole morphology를 형성하였다. 질화막 형성 및 etching을 위한 장비로 low-energy Ion beam system을 사용하였다. Reactive Ion beam은 ICP와 3-grid system으로 구성된 Ion gun으로부터 형성된다. Ion gun에 13.56 MHz의 frequency를 갖는 200W 전력을 인가하였다. Plasma로부터 나오는 Ion은 $2{\Phi}$의 직경의 hole을 가지는 3-grid hole로 추출된다. 10~70 voltage 범위의 전위를 plasma source 바로 아래의 1st gird에 인가하고, 플럭스 조절을 위해 -150V의 전위를 2nd grid에 인가한다. 그리고 3rd grid는 접지를 시켰다. chamber내의 질화 및 식각가스 공급은 2mTorr로 유지시켰다. 그리고 기판의 온도는 냉각칠러를 이용하여 -20도로 냉각을 진행하였다. 이와 같은 공정 결과로 100 nm 이상의 높이를 갖는 40 nm직경의 균일한 Silicon pillar pattern을 형성 할 수 있었다.

  • PDF

Real-Time Spacer Etch-End Point Detection (SE-EPD) for Self-aligned Double Patterning (SADP) Process

  • Han, Ah-Reum;Lee, Ho-Jae;Lee, Jun-Yong;Hong, Sang-Jeen
    • Proceedings of the Korean Vacuum Society Conference
    • /
    • 2012.02a
    • /
    • pp.436-437
    • /
    • 2012
  • Double patterning technology (DPT) has been suggested as a promising candidates of the next generation lithography technology in FLASH and DRAM manufacturing in sub-40nm technology node. DPT enables to overcome the physical limitation of optical lithography, and it is expected to be continued as long as e-beam lithography takes place in manufacturing. Several different processes for DPT are currently available in practice, and they are litho-litho-etch (LLE), litho-etch-litho-etch (LELE), litho-freeze-litho-etch (LFLE), and self-aligned double patterning (SADP) [1]. The self-aligned approach is regarded as more suitable for mass production, but it requires precise control of sidewall space etch profile for the exact definition of hard mask layer. In this paper, we propose etch end point detection (EPD) in spacer etching to precisely control sidewall profile in SADP. Conventional etch EPD notify the end point after or on-set of a layer being etched is removed, but the EPD in spacer etch should land-off exactly after surface removal while the spacer is still remained. Precise control of real-time in-situ EPD may help to control the size of spacer to realize desired pattern geometry. To demonstrate the capability of spacer-etch EPD, we fabricated metal line structure on silicon dioxide layer and spacer deposition layer with silicon nitride. While blanket etch of the spacer layer takes place in inductively coupled plasma-reactive ion etching (ICP-RIE), in-situ monitoring of plasma chemistry is performed using optical emission spectroscopy (OES), and the acquired data is stored in a local computer. Through offline analysis of the acquired OES data with respect to etch gas and by-product chemistry, a representative EPD time traces signal is derived. We found that the SE-EPD is useful for precise control of spacer etching in DPT, and we are continuously developing real-time SE-EPD methodology employing cumulative sum (CUSUM) control chart [2].

  • PDF

Fabrication of metal structure using AI sacrificial layer (알루미늄 희생층을 이용한 금속 구조물의 제작)

  • Kim, Jung-Mu;Park, Jae-Hyoung;Lee, Sang-Ho;Sin, Dong-Sik;Kim, Yong-Kweon;Lee, Yoon-Sik
    • Proceedings of the KIEE Conference
    • /
    • 2001.07c
    • /
    • pp.1893-1895
    • /
    • 2001
  • In this paper, novel release technique using wet etch is proposed. The results of this technique and the results of SAMs (Self-Assembled monolayers) coated after release using this technique are compared. Fabricated structure have 100 um in width and experimental length is from 100 um to 1 mm. Thickness of aluminum sacrificial layer is 2 um and structure thickness is 2.5 um. Cantilevers and bridges are fabricated with electroplated gold and silicon nitride deposited on substrate. An aluminium sacrificial layer was evaporated thermally and removed in various wet etching solutions. Detachment length of cantilever is 200 um and detachment length of bridge is 1 mm after isooctane rinsing. And the SAMs coating condition which is appropriate for gold and nitride are studied respectively.

  • PDF

Magnetic characteristics of Pt/Co modualted films (Pt/Co 인공격자다층막의 자기특성에 관한 연구)

  • Kim, Chan-Wook;Onishi, Atushi
    • Korean Journal of Materials Research
    • /
    • v.4 no.2
    • /
    • pp.233-240
    • /
    • 1994
  • We have investigated how the magneto-optical and recording properties of Pt/Co modulated films vary with sample preparation conditions : sputtering at various gas pressures, sputtering with Xe instead of Ar, and etching the buffer layers, etc. The magneto-optical characteristics of Pt/Co multilayers was comparable with those of currently prevailing rare-earth transition-metal alloys(Tb-Fe-Co amorphous films). On a disk of $12{\times}[Pt10.7\;{\AA}/Co2.8{\;}{\AA}]$ multilayer enhanced with 70nm silicon nitride, we have achieved a CNR of 36dB with a reading laser(${\lambda}\;=\;780nm$) power of 2.5-4.5mW for 720KHz carrier at 1.4m/s and the enhanced kerr rotation angle of $1.23^{\circ}$ at 780nm. It is suggested that Pt/Co modulated films clearly are very promising magneto-optical materials for a commercially use.

  • PDF

Aspect ratio enhancement of ZnO nanowires using silicon microcavity

  • Kar, J.P.;Das, S.N.;Choi, J.H.;Lee, Y.A.;Lee, T.Y.;Myoung, J.M.
    • Proceedings of the Materials Research Society of Korea Conference
    • /
    • 2009.05a
    • /
    • pp.34.1-34.1
    • /
    • 2009
  • A great deal of attention has been focused on ZnO nanowires for various electronics and optoelectronics applications. in the pursuit of next generation nanodevices, it would be highly preferred if well-ordered ZnO nanowires of lower dimension could be fabricated on silicon. Before the growth of nanowires, silicon substrates were selectively etched using silicon nitride as masking layer. Vertical aligned ZnO nanowires were grown by metal organic chemical vapor deposition on patterned silicon substrate. The shape of nanostructures was greatly influenced by the micropatterned surface of the substrate. The aspect ratio, packing fraction and the number density of nanowires on top surface are around 10, 0.8 and $10^7\;per\;mm^2$, respectively, whereas the values are 20, 0.3 and $5\times10^7\;per\;mm^2$, respectively, towards the bottom of the cavity. XRD patterns suggest that the nanostructures have good crystallinity. High-resolution transmission electron microscopy confirmed the single crystalline growth of the ZnO nanowires along [0001] direction.

  • PDF

Development of Ultrasonic Machine with Force Controlled Position Servo System (가공력 제어 위치 서보 시스템을 이용한 초음파 가공기의 개발)

  • 장인배;이승범;전병희
    • Transactions of Materials Processing
    • /
    • v.13 no.3
    • /
    • pp.253-261
    • /
    • 2004
  • The machining technology for the brittle materials such as ceramics are applied to the fields of MEMS(micro electromechanical system) by the progress of new machining technologies such as Etching, Diamond machining, Micro drilling, EDM(Electro discharge machining), ECDM(Electro discharge machining), USM(Ultrasonic machining), LBM(Laser beam machining), EBM(Electron beam machining). Especially, the USM technology can be applied to the dieletric brittle materials such as silicon, borosilicate glass, silicon nitride, quartz and ceramics with high aspect ratio. The micro machining system with machining force controlled position servo is developed in this paper and the optimized ultrasonic machining algorithm is constructed by the force controlled position servo control. The load cell is adapted in the force measuring and the servo control algorithm, suit for the ultrasonic machining characteristics, is estabilished with using the PID auto-tunning functions at the PMAC system which is generally adapted in the field of robot industries. The precision force signal amplifier is constructed with high precision operational amplifier AD524. The vacuum adsorption chuck which is made of titanum and internal flow line is engraved, is used in the workpiece fixing. The mahining results by USM shows that there are some deviation between the force command and the actual machining force that the servo control algorithm should be applied in the machining procedures. Therefore, the constant force controlled position servo system is developed for the micro USM system and by the examination machining process in USM, the stable USM system is realized by tracking the average value of machining force.

Fabrication of Miniaturized Shadow-mask for Local Deposition (국부증착용 마이크로 샤도우 마스크 제작)

  • 김규만;유르겐부르거
    • Journal of the Korean Society for Precision Engineering
    • /
    • v.21 no.8
    • /
    • pp.152-156
    • /
    • 2004
  • A new tool of surface patterning technique for general purpose lithography was developed based on shadow mask method. This paper describes the fabrication of a new type of miniaturized shadow mask. The shadow mask is fabricated by photolithography and etching of 100-mm full wafer. The fabricated shadow mask has over 388 membranes with apertures of micrometer length scale ranging from 1${\mu}{\textrm}{m}$ to 100s ${\mu}{\textrm}{m}$ made on each 2mm${\times}$2mm large low stress silicon nitride membrane. It allows micro scale patterns to be directly deposited on substrate surface through apertures of the membrane. This shadow mask method has much wider choice of deposit materials, and can be applied to wider class of surfaces including chemical functional layer, MEMS/NEMS surfaces, and biosensors.

The Fabrication of Micro-electrodes to Analyze the Single-grainboundary of ZnO Varistors and the Analysis of Electrical Properties (ZnO 바리스터의 단입계면 분석을 위한 마이크로 전극 제작과 전기적 특성 해석)

  • So, Soon-Jin;Lim, Keun-Young;Park, Choon-Bae
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.18 no.3
    • /
    • pp.231-236
    • /
    • 2005
  • To investigate the electrical properties at the single grainboundary of ZnO varistors, micro-electrodes were fabricated on the surface which was polished and thermally etched. Our micro-electrode had 2000 $\AA$ silicon nitride layer between micro-electrode and ZnO surface. This layer was deposited by PECVD and etched by RIE after photoresistor pattering process using by mask 1. The metal patterning of micro-electrodes used lift-off method. We found that the breakdown voltage of single grainboundary is about 3.5∼4.2 V at 0.1 mA on I-V curves. Also, capacitance-voltage measurement at single grainboundary gave several parameters( $N_{d}$, $N_{t}$, $\Phi$$_{b}$, t) which were related with grainboundary.ary.

Optimization of Drive-in Process with Various Times and Temperatures in Crystalline Silicon Solar Cell Fabrication (결정질 실리콘 태양전지 도핑 확산 공정에서 시간과 온도 변화에 의한 Drive-in 공정 연구)

  • Lee, Hee-Jun;Choi, Sung-Jin;Myoung, Jae-Min;Song, Hee-Eun;Yu, Gwon-Jong
    • 한국태양에너지학회:학술대회논문집
    • /
    • 2011.11a
    • /
    • pp.51-55
    • /
    • 2011
  • In this paper, the optimized doping condition of crystalline silicon solar cells with 156 ${\times}$ 156 mm2 area was studied. To optimize the drive-in condition in the doping process, the other conditions except drive-in temperature and time were fixed. After etching 7 ${\mu}m$ of the surface to form the pyramidal structure, the silicon nitride deposited by the PECVD had 75~80 nm thickness and 2 to 2.1 for a refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were formed by screen-printing method, followed by firing in $400-425-450-550-850^{\circ}C$ five-zone temperature conditions to make the ohmic contact. Drive-in temperature was changed in range of $828^{\circ}C$ to $860^{\circ}C$ and time was from 3 min to 40 min. The sheet resistance of wafer was fixed to avoid its effect on solar cell. The solar cell fabricated with various conditions showed the similar conversion efficiency of 17.4%. This experimental result showed the drive-in temperatures and times little influence on solar cell characteristics.

  • PDF