• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제48권9호
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• pp.662-664
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• 1999

We fabricated AC-TFEL device having cone-shaped Si micro-tip reflector array based on the process which have been conventionally employed for the Si-tip field emitter array in FED system. As a result, the AC-TFEL device having a new geometrical structure could generate well concentrated visible white-light from 3600 reflectors/pixel under bipolar pulse excitation mode only by edge-emission mechanism.

• 대한전자공학회논문지SD
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• 제43권2호
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• pp.8-12
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• 2006

졸-겔 법으로 $Pt/TiO-2/SiO_2/Si$ 기판 위에 ZnO 박막을 제작하여, 열처리 온도에 따른 박막의 결정화 특성 및 미세구조와 광학적 특성을 조사하였다. XRD 측정 결과로부터, 열처리 온도가 $600^{\circ}C$ 일때 가장 우수한 c-축 배향성을 나타냈으며, 이때 반가폭은 $0.4360^{\circ}C$ 이었다. AFM 으로 ZnO 박막의 표면형상과 표면 거칠기를 관찰한 결과, $600^{\circ}C$ 열처리 온도에서 입자가 고르게 성장하여 치밀한 박막이 형성되었음을 관찰할 수 있었고, 표면 거칠기도 1.048nm 로 가장 우수한 값을 나타내었다. ZnO 박막의 열처리 온도에 따른 PL 특성을 조사한 결과, $600^{\circ}C$로 열처리된 ZnO 박막에서 자외선 영역의 발광 피크 (378nm)는 가장 크게 가시광 영역의 발광 피크 (510nm)는 가장 작게 관찰되었다. 가시광 영역의 발광 피크가 작은 것은 산소 공공 또는 불순물이 매우 적다는 것을 의미하므로, $600^{\circ}C$로 열처리된 ZnO 박막은 비교적 화학양론적으로 성장되었음을 확인할 수 있었다.

• 한국진공학회지
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• 제2권4호
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• pp.439-454
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• 1993

The phase sequence of codeposited Co-Si alloy and Co/si multilayer thin film was investigated by differential scanning calormetry(DSC) and X-ray diffraction (XRD) analysis, The phase sequence in codeposition and codeposited amorphous Co-Si alloy thin film were CoSilongrightarrow Co2Si and those in Co/Si multilayer thin film were CoSilongrightarrowCo2Silongrightarrow and CoSilongrightarrowCo2Si longrightarrowCoSilongrightarrowCoSi2 with the atomic concentration ration of Co to Si layer being 2:1 and 1:2 respectively. The observed phase sequence was analyzed by the effectvie heat of formatin . The phase determining factor (PDF) considering structural facotr in addition to the effectvie heat of formation was used to explain the difference in the first crystalline phase between codeposition, codeposited amorphous Co-Si alloy thin film and Co/Si multilayer thin film. The crystallinity of Co-silicide deposited by multitarget bias cosputter deposition (MBCD) wasinvestigated as a funcion of deposition temperature and substrate bias voltage by transmission electron microscopy (TEM) and epitaxial CoSi2 layer was grown at $200^{\circ}C$ . Parameters, Ear, $\alpha$(As), were calculate dto quantitatively explain the low temperature epitaxial grpwth of CoSi2 layer. The phase sequence and crystallinity had a stronger dependence on the substrate bias voltage than on the deposition temperature due to the collisional daxcade mixing, in-situ cleannin g, and increase in the number of nucleation sites by ion bombardment of growing surface.

• 한국결정성장학회지
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• 제7권2호
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• pp.207-215
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• 1997

Ionized Cluster Beam Deposition(ICBD)방법을 이용하여 Si(100)기판과 TiN(60 nm)/Si(100)기판위에 Al 박막을 증착하였다. 증착된 Al 박막의 증착특성은 $\alpha$-step, four-point-probe, XRD, SEM, AES 측정장치를 가지고 조사해 보았다. 도가니 온도가 증가함에 따라 Al 박막의 증착속도는 증가하였고 비저항 값은 감소하였다. 도가니 온도가 $1800^{\circ}C$인 경우 가속전압이 증가함에 따라 연속적이며 평평한 박막이 형성되고 비저항이 감소되었다. 최소의 비저항 값은 Si 기판에서는 가속전압이 4 kV일 때 3.4 $\mu \Omega \textrm {cm}$, TiN 기판에서는 가속전압이 2kV일 때 3.6 $\mu \Omega \textrm {cm}$. AES 분석결과 형성된 박막내에서는 불순물이 존재하지 않는 것을 알 수 있었다. 따라서 Al 박막의 비저항은 박막충의 미세구조에 의해 영향을 받는다.

• 반도체디스플레이기술학회지
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• 제6권3호
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• pp.19-23
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• 2007

The NiSi is very promising candidate for the metallization in 45 nm CMOS process such as FUSI(fully silicided) gate and source/drain contact because it exhibits non-size dependent resistance, low silicon consumption and mid-gap workfunction. Ni film was first deposited by using ALD (atomic layer deposition) technique with Bis-Ni precursor and $H_2$ reactant gas at $220^{\circ}C$ with deposition rate of $1.25\;{\AA}/cycle$. The as-deposited Ni film exhibited a sheet resistance of $5\;{\Omega}/{\square}$. RTP (repaid thermal process) was then performed by varying temperature from $400^{\circ}C$ to $900^{\circ}C$ in $N_2$ ambient for the formation of NiSi. The process temperature window for the formation of low-resistance NiSi was estimated from $600^{\circ}C$ to $800^{\circ}C$ and from $700^{\circ}C$ to $800^{\circ}C$ with and without Ti capping layer. The respective sheet resistance of the films was changed to $2.5\;{\Omega}/{\square}$ and $3\;{\Omega}/{\square}$ after silicidation. This is because Ti capping layer increases reaction between Ni and Si and suppresses the oxidation and impurity incorporation into Ni film during silicidation process. The NiSi films were treated by additional thermal stress in a resistively heated furnace for test of thermal stability, showing that the film heat-treated at $800^{\circ}C$ was more stable than that at $700^{\circ}C$ due to better crystallinity.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2008년도 춘계학술대회 논문집
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• pp.139-140
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• 2008

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 하계학술대회 논문집
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• pp.6-6
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• 2010

This paper describes that single crystal cubic silicon (3C-SiC) films have been deposited on carbonized Si(100) substrate using hexamethyldisilane(HMDS, $Si_2(CH_3)_6$) as a safe organosilane single-source precursor and a nonflammable mixture of Ar and $H_2$ gas as the carrier gas by APCVD at $1280^{\circ}C$. The 3C-SiC film had a very good crystal quality without defects due to viods, a very low residual stress.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권12호
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• pp.565-569
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• 2006

Plasma enhanced chemical vapor deposition(PECVD) is a well established technique for the deposition of hydrogenated film of silicon nitride (SiNx:H), which is commonly used as an antireflection coating as well as passivating layer in crystalline silicon solar cell. PECVD-SiNx:H films were investigated by varying the deposition and annealing conditions to optimize for the application in silicon solar cells. By varying the gas ratio (ammonia to silane), the silicon nitride films of refractive indices 1.85 - 2.45 were obtained. The film deposited at $450^{\circ}C$ showed the best carrier lifetime through the film deposition rate was not encouraging. The film deposited with the gas ratio of 0.57 showed the best carrier lifetime after annealing at a temperature of $800^{\circ}C$. The single crystalline silicon solar cells fabricated in conventional industrial production line applying the optimized film deposition and annealing conditions on large area substrate of size $125mm{\times}125mm$ (pseudo square) was found to have the conversion efficiencies as high as 17.05 %. Low cost and high efficiency silicon solar cells fabrication sequence has also been explained in this paper.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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• pp.138.1-138.1
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• 2013

We present the low temperature (${\leq}1,000^{\circ}C$) vacuum sublimation behavior of an e-beam evaporative deposited on a SiC film and a method to reduce the vacuum sublimation through an ion beam process. The density of the SiC film deposited using the e-beam evaporation method was ~60% of the density of the bulk source material. We found that the sublimation became appreciable above ${\sim}750^{\circ}C$ under $1.5{\times}10^{-5}$ torr pressure and the sublimation rate increased with an increase in temperature, reaching ~70 nm/h at $950^{\circ}C$ when the coated sample was heated for 5 h. When the film was irradiated with 70 keV N+ ions prior to heating, the sublimation rate decreased to ~23 nm/h at a fluence of $1{\times}10^{17}\;ions/cm^2$. However, a further increase in fluence beyond this value or an extended heating period did not change (decrease or increase) the sublimation rate any further.

• 한국전기전자재료학회논문지
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• 제17권6호
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• pp.580-585
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• 2004

Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.