• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.487-487
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• 2013

According to shrinkage of transistor, interface traps have been recognized as a major factor which limits the process development in manufacturing industry. The traps occur through spontaneous generation process, and spread into the forbidden band. There is a large change of current though a few traps are existed at the Si-SiO2 interface. Moreover, the increased temperature largely affects to the leakage current due to the interface trap. For this reason, we made an effort to find out the relationship between temperature and interface trap. The subthreshold swing (SS) was investigated to confirm the correlation. The simulated results show that the sphere of influence of trap is enlarged according to increase in temperature. To investigate the relationship between thermal energy and surface potential, we extracted the average surface potential and thermal energy (kT) according to the temperature. Despite an error rate of 6.5%, change rates of both thermal energy and average surface potential resemble each other in many ways. This allows that SS is affected by the trap within the range of the thermal energy from the surface energy.

• Proceedings of the Materials Research Society of Korea Conference
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• 2011.05a
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• pp.26.1-26.1
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• 2011

We investigated the atomic layer deposition (ALD) process for nitrogen doped ZnO and the application for n-ZnO : N/p-Si (NW) coaxial hetero-junction photodetectors. ALD ZnO:N was deposited using diethylzinc (DEZ) and diluted $NH_4OH$ at $150^{\circ}C$ of substrate temperature. About 100~300 nm diameter and 5 um length of Si nanowires array were prepared using electroless etching technique in 0.108 g of $AgNO_3$ melted 20 ml HF liquid at $75^{\circ}C$. TEM images showed ZnO were deposited on densely packed SiNW structure achieving extraordinary conformality. When UV (360 nm) light was illuminated on n-ZnO:N/p-SiNW, I-V curve showed about three times larger photocurrent generation than film structure at 10 V reverse bias. Especially, at 660 nm wave length, the coaxial structure has 90.8% of external quantum efficiency (EQE) and 0.573 A/W of responsivity.

• Transactions on Electrical and Electronic Materials
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• v.16 no.4
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• pp.212-220
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• 2015

We investigated nanotextured Si solar cells using the silver-assisted chemical etching process. The nanotexturing process is very sensitive to the concentration of chemical etching solution. The high concentration process results in a nanowire formation for the nanosurfaces and causes severe surface damage to the top region of the micropyramids. These nanowires show excellent light absorption in photoreflectance spectra and radiative light emission in photoluminescence spectra. However, the low concentration process forms a nano-roughened surface and provides high minority carrier lifetimes. The nano-roughened surfaces of the samples show the improved electrical cell properties of quantum efficiency, conversion efficiency, and cell fill factor due to the reduction in the formation of the over-doped dead layer.

• Journal of the Korean Ceramic Society
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• v.45 no.3
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• pp.142-145
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• 2008

The growth of amorphous silica nanowires by on-site feeding of silicon and oxygen is reported. The nanowires were grown on a nickel-coated oxidized silicon substrate without external silicon or oxygen sources. Transmission electron microscopy observation revealed that the nanowires, which have diameters of less than 50 nm and a length of several micrometers, were grown using a traditional vapor-liquid-solid mechanism. Blue photoluminescence was observed from these nanowires at room temperature. An approach to grow nanowires without external precursors may be useful when integrating nanowires into devices structures. This can benefit the fabrication of nanowire-based nanodevices.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.488.2-488.2
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• 2014

Carbon-based materials such as carbon nanotubes and graphene have emerged as promising building blocks in applications for nanoelectronics and energy devices due to electrical property, ease of processability, and relatively inert electrochemistry. In recent years, there has been considerable interest in core-shell nanomaterials, in which inorganic nanowires are surrounded by inorganic or organic layers. Especially, carbon encapsulated semiconductor nanowires have been actively investigated by researchers in lithium ion batteries. We report a method to synthesize silicon nanowire (SiNW) core/carbon shell structures by chemical vapor deposition (CVD), using methane (CH4) as a precursor at growth temperature of $1000{\sim}1100^{\circ}C$. Unlike carbon-based materials synthesized via conventional routes, this method is of advantage of metal-catalyst free growth. We characterized these materials with FE-SEM, FE-TEM, and Raman spectroscopy. This would allow us to use these materials for applications ranging from optoelectronics to energy devices such as solar cells and lithium ion batteries.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2014.11a
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• pp.104-105
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• 2014

마이크로 패턴된 Au 전극사이에 얼라인된 Tellurium (Te) 나노리본들이 의도한 모양과 배열방식을 가지고 리쏘그래피 패턴 전해증착 (Lithographically patterned nanowier electrodepositon, LPNE) 방법에 의해 4인치 Si wafer 배치로 합성되었다. 합성된 Te 나노리본은 수 센티미터의 길이를 가지고, 그 두께와 폭 역시 작업 전극으로 사용되는 Si wafer위에 증착된 Ni의 두께와 전해증착 시간에 의해 쉽게 제어될 수 있다. $3{\mu}m$의 간격을 갖는 Au 전극 사이에 얼라인된 두께 ~100nm의 Te 나노리본들은 전해증착에 의해 그 폭이 제어되었고, 각각의 다른 폭을 갖는 증착된 하나의 Te 나노리본들의 IV 및 FET 측정을 통하여 나노리본 폭의 변화에 따른 전기적 특성 (비저항, FET 이동도 및 FET 캐리어 농도)이 평가되었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2006.06a
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• pp.101-102
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• 2006

금속을 도핑 함으로써 전기전도도가 향상될 것으로 생각되는 산화바나듐 나노선에 대하여 열처리 전후의 전기적 특성을 비교하였다. sol-gel 방법으로 만들어진 산화바나듐 xerogel($V_{1.66}Mo_{0.33}O_5{\cdot}nH_2O$)을 $Si_3N_4$ 절연막이 성장된 Si기판위에 분산시키고 Ti/Au으로 전극을 증착한 후 열처리 한 것과 하지 않은 두 시료의 전류-전압특성을 비교 분석하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.289-289
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• 2013

While there are plenty of studies on synthesizing semiconducting germanium nanowires (Ge NWs) by vapor-liquid-solid (VLS) process, it is difficult to inject dopants into them with uniform dopants distribution due to vapor-solid (VS) deposition. In particular, as precursors and dopants such as germane ($GeH_4$), phosphine ($PH_3$) or diborane ($B_2H_6$) incorporate through sidewall of nanowire, it is hard to obtain the structural and electrical uniformity of Ge NWs. Moreover, the drastic tapered structure of Ge NWs is observed when it is synthesized at high temperature over $400^{\circ}C$ because of excessive VS deposition. In 2006, Emanuel Tutuc et al. demonstrated Ge NW pn junction using p-type shell as depleted layer. However, it could not be prevented from undesirable VS deposition and it still kept the tapered structures of Ge NWs as a result. Herein, we adopt $C_2H_2$ gas in order to passivate Ge NWs with carbon sheath, which makes the entire Ge NWs uniform at even higher temperature over $450^{\circ}C$. We can also synthesize non-tapered and uniformly doped Ge NWs, restricting incorporation of excess germanium on the surface. The Ge NWs with carbon sheath are grown via VLS process on a $Si/SiO_2$ substrate coated 2 nm Au film. Thin Au film is thermally evaporated on a $Si/SiO_2$ substrate. The NW is grown flowing $GeH_4$, HCl, $C_2H_2$ and PH3 for n-type, $B_2H_6$ for p-type at a total pressure of 15 Torr and temperatures of $480{\sim}500^{\circ}C$. Scanning electron microscopy (SEM) reveals clear surface of the Ge NWs synthesized at $500^{\circ}C$. Raman spectroscopy peaked at about ~300 $cm^{-1}$ indicates it is comprised of single crystalline germanium in the core of Ge NWs and it is proved to be covered by thin amorphous carbon by two peaks of 1330 $cm^{-1}$ (D-band) and 1590 $cm^{-1}$ (G-band). Furthermore, the electrical performances of Ge NWs doped with boron and phosphorus are measured by field effect transistor (FET) and they shows typical curves of p-type and n-type FET. It is expected to have general potentials for development of logic devices and solar cells using p-type and n-type Ge NWs with carbon sheath.

• Journal of the Korean Ceramic Society
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• v.47 no.6
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• pp.623-626
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• 2010

We synthesized ZnO nanowires patterned on Si substrate and investigated the field emission properties of the nanowires. Firstly, Au catalyst layers were fabricated on Si substrate by photo-lithography and lift-off process. The diameter of Au pattern was $50\;{\mu}m$ and the pattern was arrayed as $4{\times}4$. ZnO nanowires were grown on the Au catalyst pattern by the aid of Au liquid phase. The orientation of the ZnO nanowires was vertical on the whole. Sufficient brightness was obtained when the electric field was $5.4\;V/{\mu}m$ and the emission current was $5\;mA/cm^2$. The threshold electric field was $5.4\;V/{\mu}m$ in the $4{\times}4$ array of ZnO nanowires, which is quite lower than that of the nanowires grown on the flat Si substrate. The lower threshold electric field of the patterned ZnO nanowires could be attributed to their vertical orientation of the ZnO nanowires.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.143-143
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• 2008

Nanowires are promising options for building nanoscale electronic structures coming from high conductivity of nanowires. In particular, Deoxyribonucleic acid (DNA), which is structurally nanowire, can obtain highly ordered electronic components for nanocircuitry and/or nanodevices because of its very flexible length controllability, nanometer-size diameter, about 2 nm, and self-assembling properties. In this work, we used the method to form DNA-Nanowires (NWs) by using chemical treatment on Silicon (Si) surface, and Aminopropyl-triethoxysilane (APTES) was used as inducer of DNA sequence to modify the characteristics of Si surface. Moreover, we performed tilting technique to align DNA by the direction of flow of DNA solution. We investigated the assembly process between DNA molecules and APTES - coated Si surface according to the APTES concentration, from $1.2{\mu}\ell$ to $120{\mu}\ell$. Atomic Force Microscopy (AFM) images showed the combination rate of DNA molecules by the change of APTES concentration. As APTES concentration becomes thicker, aggregation of DNA molecules occurs, and this makes a kind of DNA networks. In this respect, we confirmed that there's a positive relationship between the concentration of APTES and the formation rate of DNA nanowires. Since there have been lots of research preceded to utilize DNA nanowires as template, so by using this positive relationship with proper alignment technique, realization of nano electronic devices with DNA nanowires might be feasible.