• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.1
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• pp.74-80
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• 1990

The transconductance of short channel LDD MOSFETs in the saturation region (high Vd)has shown different characteristics from that of conventional device. The transconductance in saturation regime of short channel LDD MOSFETs is reduced from maximum value at higher gate voltage. This decline is analyzed as the velocity saturation effects of carrier at LDD region but accurate analytical expressions for the drain current Idsat and the transconductance Gmsat in the saturation regime are still not in existence. Recently the drain current dependence of parasitic source resistance Rs has been modeled from the velocity saturation of carriers in LDD region. In this study, we approximate that Rmsat that Rs is linearly dependent on the applied gate voltage. Analytical expressions for Idsat and Gmsat obtained from this approximation show the same general behavior as experimental results of short channel LDD NMOSFETs.

• Journal of information and communication convergence engineering
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• v.5 no.1
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• pp.45-49
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• 2007

The analytical transport model in subthreshold regime for double gate MOSFET has been presented to analyze the short channel effects such as subthreshold swing, threshold voltage roll-off and drain induced barrier lowering. The present approach includes the quantum tunneling of carriers through the source-drain barrier. Poisson equation is used for modeling thermionic emission current, and Wentzel-Kramers-Brillouin approximations are applied for modeling quantum tunneling current. This model has been used to investigate the subthreshold operations of double gate MOSFET having the gate length of the nanometer range with ultra thin gate oxide and channel thickness under sub-20nm. Compared with results of two dimensional numerical simulations, the results in this study show good agreements with those for subthreshold swing and threshold voltage roll-off. Note the short channel effects degrade due to quantum tunneling, especially in the gate length of below 10nm, and DGMOSFETs have to be very strictly designed in the regime of below 10nm gate length since quantum tunneling becomes the main transport mechanism in the subthreshold region.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2005.05a
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• pp.51-56
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• 2005

For a fire cause judgement this paper describes the short circuit characteristics of a electric wire through the cross section analysis under ac condition. The cower wires prepared for the experiment were 1.2mm, 1.6mm, and 2.0mm in diameter. Through the cross section analysis(CSA), it was confirmed that the dendrite structure grew at the angle of about $40^{\circ}\;or\;60^{\circ}$ when the fusing current was applied to the wires. The larger the fusing current is, the more decreased the growth angle of the dendrite structure is. It was confirmed that the dendrite structure was arranged like the columnar structure. In this paper, the characteristics analysis of short circuit was carried out in the range of transient duration and the correlation constant k was investigated by measuring the short circuit duration and the fusing current.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.37 no.2
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• pp.6-11
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• 2000

In this paper, suggesting a new linearly -graded depletion edge approximation, the current-voltage characteristics of an n-type short-channel GaAs MESFET device has been analyzed by solving the two dimensional Poisson's equation in the depletion region. In this model, the expressions for the threshold voltage, the source and the drain ohmic resistance, and the drain current were derived. As a result, typical Early effect of a short channel device was shown and the ohmic voltage drop by source and drain contact resistances could be explained. Furthermore our model could analyze both the short-channel device and the long-channel device in a unified manner.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.2
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• pp.119-126
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• 1999

Current transformer (CT) saturation may cause a variety of protective relays to malfunction. The conventional CT is designed that it can carry up to 20 times the rated current without exceeding 10% ratio error. However, the possibility of CT saturation still remains if the fault current contains substantial amounts of ac and/or dc components. This paper presents a design method of iron-cored CTs for use with protective relays to prevent CT saturation. The proposed design method determines the core cross section of the CT; it employs the transient dimensioning factor to consider relay's operating time (duty cycle) and dc component as well as ac components contained in the fault current, and symmetrical short-circuit current factor to consider as well as ac components contained in the fault current, and symmetrical short-circuit current factor to consider the biggest fault current. The method designs the cross section of CTs in cases of reclosure and no reclosure.

• Proceedings of the KIEE Conference
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• 2007.11b
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• pp.154-155
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• 2007

Increase of fault current due to larger power demand has increased the possibility of the breakdown of the power system. To protect the power system effectively from the larger fault current, several countermeasures have been proposed. Among them, the superconducting fault current limiter (SFCL) has been expected as one of the most effective solutions. In this paper, the fault current limiter, which consists of a ideal switch as a trigger part and the limiter as the limiting part, has been applied into the distribution system. From the analysis for the fault current limiting operation of SFCL, the inserting resistance's magnitude has been confirmed to affect OCR trip time in a short-circuit of distribution system.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.2
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• pp.110-116
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• 2009

The prominent advantages of Dual Material Surrounding Gate (DMSG) MOSFETs are higher speed, higher current drive, lower power consumption, enhanced short channel immunity and increased packing density, thus promising new opportunities for scaling and advanced design. In this Paper, we present Transconductance-to-drain current ratio and electric field distribution model for dual material surrounding gate (DMSGTs) MOSFETs. Transconductance-to-drain current ratio is a better criterion to access the performance of a device than the transconductance. This proposed model offers the basic designing guidance for dual material surrounding gate MOSFETs.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.23 no.7
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• pp.20-28
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• 2009

This paper presents the design of zero current switching ZCS pulse frequency modulation type DC-DC converter for magnetron power supply. A magnetron serving as the microwave source in a microwave oven is driven by a switch mode power supply (SMPS). SMPSs have the advantages of improved efficiency, reduced size and weight, regulation and the ability to operate directly from the converter DC bus. The demands of the load system and the design of the power supply required to produce constant power at 4[kV]. A magnetron power supply requires the ability to limit the load current under short circuit conditions. The current source series resonant converter is a circuit configuration which can achieve this. The main features of the proposed converter are an inherent protection against a short circuit at the output, a high voltage gain and zero current switching over a large range of output power. These characteristics make it a viable choice for the implementation of a high voltage magnetron power supply.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.25 no.2
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• pp.137-142
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• 2011

In this paper, the fault current limiting and the hysteresys characteristics of a superconducting fault current limiter (SFCL) using magnetic coupling of two coils on the iron core with an air-gap were analyzed. The introduction of the air-gap in the SFCL with magnetically coupled two coils can suppress the saturation of the iron-core and, on the other hand, make the limiting impedance of the SFCL decreased, which results from the increase of the exciting current. To analyze the effect of the aig-gap on the fault current limiting characteristics of the SFCL, the hysteresys curves of the iron core comprising the SFCL were derived from the short-circuit experiment and the variation in the voltage-current trace of the SFCL during the fault period was analyzed. Through the comparison with the current limiting characteristics of the SFCL without air-gap, the air-gap could be confirmed to contribute to the suppression of the iron core's saturation through the increase of the SFCL's burden from the short-circuit current.

• Journal of Electrical Engineering and Technology
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• v.7 no.5
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• pp.659-663
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• 2012

The application of large power transformer into a power distribution system was inevitable due to the increase of power demand and distributed generation. However, the decrease of the power transformer's impedance caused the short-circuit current of the power distribution system to be increase thus, the higher short-circuit current exceeded the cut-off ratings of the protective devices such as circuit breaker. To solve these problems, several countermeasures have been proposed to protect the power system effectively from higher fault current and the superconducting fault current limiter (SFCL) has been expected to be the promising countermeasure. In spite of excellent current limiting performances of the SFCL, on the other hand, the efforts to apply the SFCL into power system has been delayed due to both the limited spaces for the SFCL's installation and its long recovery time after the fault removal. In order to solve these problems, a hybrid SFCL, which can perform either first half cycle limiting of first half cycle non-limiting operation, has been developed by corporation of LSIS (LS Industrial System) and KEPCO (Korea Electric Power Corporation). In this paper, we tried to requirements hybrid SFCL by PSCAD/EMTDC. Simulation results of our analysis of the hybrid SFCL is that its accompanied the characteristics both the limit the fault current and quick recovery caused by the less impact from superconductor.