• Title/Summary/Keyword: Short Fault

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Development of Arc-horn to be mounted on 154kV Transmission Line Arrester (154kV 송전선로 피뢰기 설치용 아킹혼 개발)

  • Min, Byeong-Wook;Kim, Woo-Kyum;Lee, Buk-Chang;Choi, Han-Yeol;Park, Jae-Ung;Keum, Eui-Yeon
    • Proceedings of the KIEE Conference
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    • 2008.07a
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    • pp.335-336
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    • 2008
  • Overhead transmission lines are mainly crossing mountainous area. They are easily affected in weathers like typhoon, strong wind, lightning, heavy rain, or heavy snow. Sometimes these weathers cause transmission line faults. A lightning flashover is most often fault. Nowadays lightning density in KOREA is growing high and lightning flashovers occur more often. A lightning flashover on transmission line is mostly cleared by momentary operation of a circuit breaker, so power failure happens rarely. However, when both circuits trip simultaneously due to the lightning flashovers on double circuit transmission line, short time power failure and voltage drop happen. KEPCO has used transmission line arresters to avoid double circuit simultaneous trip out since 2003. And transmission line arresters cannot be installed with KEPCO's present metal fittings, so various fittings have been used for each transmission line arrester manufacturer. This paper introduces development and standardization of arc-horn and metal fittings for transmission line arrester which can be used for both existing lines and new lines in KEPCO.

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Experimental Approach and Simulation-Based Design of Eddy Current Sensors for Inspection of Vehicular Bolts (자동차용 볼트의 검사를 위한 시뮬레이션에 기반한 ECT 센서 설계 및 실험적특성)

  • Im, Kwang-Hee;Lee, Seul-Gi;Kim, Hak-Joon;Song, Sung-Jin;Woo, Yong-Deuck;Ra, Seung-Woo;Lee, Hyung-Ho
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.24 no.3
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    • pp.294-301
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    • 2015
  • Oil filters for vehicular parts are used under high and low temperatures as the engine is cooled, and defects can be generated with repeated changes in the operating environment and with changes in the shape, such as very high internal losses for the bolts. Visually checking for defects inside a bolt is impossible. Nondestructive evaluation methods such as eddy current testing (ECT) are recommended as a more effective way to examine inside a bolt and detect surface defects in a short amount of time. In this study, the fit bobbin coil eddy current probe was applied to checking the bolts. The bolt parameters were calculated by using a COMSOL analysis program to obtain parameters for professional interior design and fault diagnosis.

A Study on Development of Scaled-down HVDC Model (HVDC의 축소형 모델 개발에 관한 연구)

  • Ahn, Jong-Bo;Yun, Jae-Young;Kim, Kook-Hun;Lee, Jong-Moo;Kim, Jong-Moon;Lee, Ki-Do
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.219-221
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    • 1999
  • HVDC(High Voltage Direct Current) transmission system was constructed between Cheju island and mainland Haenam and has been operating commercially since 1998. But research activities in this area are not so much. That is caused by the facts that HVDC is large scale system and it is not so easy to implement and to test. Though such simulation tools as RTDS(Real Time Digital Simulator) and EMTDC can be useful, these have limitations for actual control and protective system design. Therefore scaled-down HVDC model was developed for the purpose of researches at operating technique, control and protection methods. The design of this model was based on real Cheju-Haenam HVDC system. And additionally faults simulator such as ground fault, short-circuit and change of impedance in transmission line is equipped for analysis of these faults. Control system of the model was implemented fully digitally. So it is very easy for the researchers to develope control and protection algorithm and to test the performance.

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Dynamic Analysis of the PDLC-based Electro-Optic Modulator for Fault Identification of TFT-LCD (박막 트랜지스터 기판 검사를 위한 PDLC 응용 전기-광학 변환기의 동특성 분석)

  • 정광석;정대화;방규용
    • Journal of the Korean Society for Precision Engineering
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    • v.20 no.4
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    • pp.92-102
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    • 2003
  • To detect electrical faults of a TFT (Thin Film Transistor) panel for the LCD (Liquid Crystal Display), techniques of converting electric field to an image are used One of them is the PDLC (polymer-dispersed liquid crystal) modulator which changes light transmittance under electric field. The advantage of PDLC modulator in the electric field detection is that it can be used without physically contacting the TFT panel surface. Specific pattern signals are applied to the data and gate electrodes of the panel to charge the pixel electrodes and the image sensor detects the change of transmittance of PDLC positioned in proximity distance above the pixel electrodes. The image represents the status of electric field reflected on the PDLC so that the characteristic of the PDLC itself plays an important role to accurately quantify the defects of TFT panel. In this paper, the image of the PDLC modulator caused by the change of electric field of the pixel electrodes on the TFT panel is acquired and how the characteristics of PDLC reflect the change of electric field to the image is analyzed. When the holding time of PDLC is short, better contrast of electric field image can be obtained by changing the instance of applying the driving voltage to the PDLC.

Application Management System with ZeroMQ and Alarms in Distribution Management System (배전운영 시스템에서의 ZeroMQ와 알람 정보를 이용한 운영기능 관리 시스템)

  • Kim, Pil-Seok;Kang, Ho-Young;Lim, Il-Hyung;Park, Jong-Ho;Shin, Yong-Hak
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.64 no.8
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    • pp.1161-1167
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    • 2015
  • Distribution Management System(DMS) ienhancing distribution automation system-based operation efficiency is an optimized system by various operational applications in a distribution network. DMS employs various applications like topology reconfiguration, volt/var control, and restoration at events such as overload, voltage violation, and a fault in a distribution system. An operation efficiency to employ multi-applications as restoration with short-term load forecasting is higher than a performance by a single application; and the applications are accomplished by an operator’s control. Applications’ combination is determined by various alarm information which means critical issues in order to operate a distribution system. Thus, this paper proposes an application management system which can configure application combination, control applications depending on alarm information and check their performance condition. The proposed application management system can be customized by operator easily and have high operation efficiency and reliability because it is worked by reviewed alarm information from operator.

Investigation of SLF Interruption Capability of Gas Circuit Breaker with CFD and a Mathematical Arc Model

  • Cho, Yong-Sung;Kim, Hong-Kyu;Chong, Jin-Kyo;Lee, Woo-Young
    • Journal of Electrical Engineering and Technology
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    • v.8 no.2
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    • pp.354-358
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    • 2013
  • This paper discusses the analysis of arc conductance in a gas circuit breaker (GCB) during current interruption process and the investigation method of the interruption capability. There are some limitations in the application of the computational fluid dynamics (CFD) for the implementation of an arc model around the current zero, despite the fact that it gives good results for the high-current phase arc. In this study, we improved the accuracy in the analysis of the interruption performance by attempting the method using CFD and a mathematical arc model. The arc conductance at 200 ns before current zero (G-200ns) is selected as the indicator to predict the current interruption of the Short Line Fault (SLF). Finally, the proposed method is verified by applying to the actual circuit breakers which have different interruption performances.

Design and fabrication of the Built-in Testing Circuit for Improving IC Reliability (IC 신뢰성 향상을 위한 내장형 고장검출 회로의 설계 및 제작)

  • Ryu, Jang-Woo;Kim, Hoo-Sung;Yoon, Jee-Young;Hwang, Sang-Joon;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.5
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    • pp.431-438
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    • 2005
  • In this paper, we propose the built-in current testing circuit for improving reliability As the integrated CMOS circuits in a chip are increased, the testability on design and fabrication should be considered to reduce the cost of testing and to guarantee the reliability In addition, the high degree of integration makes more failures which are different from conventional static failures and introduced by the short between transistor nodes and the bridging fault. The proposed built-in current testing method is useful for detecting not only these failures but also low current level failures and faster than conventional method. In normal mode, the detecting circuit is turned off to eliminate the degradation of CUT(Circuits Under Testing). The differential input stage in detecting circuit prevents the degradation of CUT in test mode. It is expected that this circuit improves the quality of semiconductor products, the reliability and the testability.

A Survey on Health Monitoring and Management Technology for Liquid Rocket Engines (액체로켓엔진의 건전성 감시및 관리 기법에 관한 현황 분석)

  • Cha, Jihyoung;Ha, Chulsu;O, Suheon;Ko, Sangho
    • Journal of the Korean Society of Propulsion Engineers
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    • v.18 no.6
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    • pp.50-58
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    • 2014
  • This paper is about a short survey on the recent research activities regarding health monitoring and management for liquid rocket engines. For this, we investigate the precedent techniques developed in advanced space-industry countries which are USA, EU, Russia, Japan and China. Particularly, we focus on the technologies applied in China, a recently joined to the advanced space-industry countries in this field. Then we discuss some important points to be considered to apply to the development of the Korea Space Launch Vehicle KSLV-II and other related projects.

An Efficient Test Algorithm for Dual Port Memory (이중 포트 메모리를 위한 효과적인 테스트 알고리듬)

  • 김지혜;송동섭;배상민;강성호
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.72-79
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    • 2003
  • Due to the improvements in circuit design technique and manufacturing technique, complexity of a circuit is growing along with the demand for memories with large capacities. Likewise, as a memory capacity gets larger, testing gets harder and testing cost increases, and testing process in chip development gets larger as well. Therefore, a research on an effective test algorithm to improve the chip yield rate in a short time period is becoming an important task. This paper proposes an effective, March C-algorithm based, test algorithm that can also be applied to a dual-port memory since it considers all the fault types, which can be occurred in a single-port as well as in a dual-port memory, without increasing the test length.

IDDQ Test Pattern Generation in CMOS Circuits (CMOS 조합회로의 IDDQ 테스트패턴 생성)

  • 김강철;송근호;한석붕
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.1
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    • pp.235-244
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    • 1999
  • This Paper proposes a new compaction algorithm for IDDQ testing in CMOS Circuits. A primary test pattern is generated by the primitive fault pattern which is able to detect GOS(gate-oxide short) and the bridging faults in an internal primitive gate. The new algorithm can reduce the number of the test vectors by decreasing the don't care(X) in the primary test pattern. The controllability of random number is used on processing of the backtrace together four ones of heuristics. The simulation results for the ISCAS-85 benchmark circuits show that the test vector reduction is more than 45% for the large circuits on the average compared to static compaction algorithms.

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