• 제목/요약/키워드: Shifter

검색결과 389건 처리시간 0.03초

Design and Fabrication of a Phase Shifter RFIC using a Tunable Multi-layer Dielectric

  • 이영철
    • 한국산업정보학회논문지
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    • 제19권2호
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    • pp.45-49
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    • 2014
  • In this work, a phase shifter radio-frequency integrated chip (RFIC) using a simple all-pass network is presented. As a tuning element of the phase shifter RFIC, tunable capacitors with a multi-layer dielectric of a para-/ferro-/para-electrics using a high tunable BST ferroelectric and a low-loss BZN paraelectric thin film were utilized. In order to evaluate and analyze the fabricated phase shifter RFIC, the same elements such as an inductor and capacitor integrated into it are also fabricated and tested. The designed phase shifter RFIC was fabricated on a quartz substrate in the size of $1.16{\times}1.21mm^2$. As the test results, the maximum phase difference of $350^{\circ}$ is obtained at 15 V and its tuning frequency bandwidth is 90 MHz from 2.72 to 2.81GHz.

Development of Liquid Stub and Phase Shifter

  • Wang, Son-Jong;Yoon, Jae-Sung;Hong, Bong-Guen
    • Nuclear Engineering and Technology
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    • 제33권2호
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    • pp.201-208
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    • 2001
  • The high power RF transmission line components are required for transmitting MW level RF power continuously in RF heating and current drive system which heat the plasma and produce plasma current in fusion reactor The liquid stub and phase shifter is proposed as the superior to the conventional stub and phase shifter. Experimental results show that they are reliable and easy to operate compared to the conventional stub and phase shifter. There is no distortion of reflected power during the raising of the liquid level. RF breakdown voltage is over 40kV. Temperature increment of the liquid is expected not to be severe. These results verify that the liquid stub and phase shifter can be used reliably in the high power continuous RF facilities.

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A Phase-shifter for Regulating Circulating Power Flow in a Parallel-feeding AC Traction Power System

  • Choi, Kyu-Hyoung
    • Journal of Electrical Engineering and Technology
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    • 제9권4호
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    • pp.1137-1144
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    • 2014
  • A parallel-feeding AC traction power system increases the power supply capacity and decreases voltage fluctuations, but the circulating power flow caused by the phase difference between the traction substations prevents the system from being widely used. A circuit analysis shows that the circulating power flow increases almost linearly as the phase difference increases, which adds extra load to the system and results in increased power dissipation and load unbalance. In this paper, we suggest a phase shifter for the parallel-feeding AC traction power system. The phase shifter regulates the phase difference and the circulating power flow by injecting quadrature voltage which can be obtained directly from the Scott-connection transformer in the traction substation. A case study involving the phase shifter applied to the traction power system of a Korean high-speed rail system shows that a three-level phase shifter can prevent circulating power flow while the phase difference between substations increases up to 12 degrees, mitigate the load unbalance, and reduce power dissipation.

Simulation of A 90° Differential Phase Shifter for Korean VLBI Network 129 GHz Band Polarizer

  • Chung, Moon-Hee;Je, Do-Heung;Han, Seog-Tae;Kim, Soo-Yeon
    • Journal of Astronomy and Space Sciences
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    • 제27권3호
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    • pp.239-244
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    • 2010
  • A simulation for the design of a $90^{\circ}$ differential phase shifter aimed toward Korean VLBI Network (KVN) 129 GHz band polarizer is described in this paper. A dual-circular polarizer for KVN 129 GHz band consists of a $90^{\circ}$ differential phase shifter and an orthomode transducer. The differential phase shifter is made up of a square waveguide with two opposite walls loaded with corrugations. Three-dimensional electromagnetic simulation has been performed to predict the $90^{\circ}$ differential phase shifter's characteristics. The simulation for the differential phase shifter shows that the phase shift is $90^{\circ}{\pm}3.3^{\circ}$ across 108-160 GHz and the return losses of two orthogonal modes are better than -30 dB within the design frequency band. According to the simulation results the calculated performance is quite encouraging for KVN 129 GHz band application.

잡음 내성이 큰 단일 출력 레벨 쉬프터를 이용한 500 V 하프브리지 컨버터용 구동 IC 설계 (Design of the Driver IC for 500 V Half-bridge Converter using Single Ended Level Shifter with Large Noise Immunity)

  • 박현일;송기남;이용안;김형우;김기현;서길수;한석봉
    • 한국전기전자재료학회논문지
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    • 제21권8호
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    • pp.719-726
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    • 2008
  • In this paper, we designed driving IC for 500 V resonant half-bridge type power converter, In this single-ended level shifter, chip area and power dissipation was decreased by 50% and 23.5% each compared to the conventional dual-ended level shifter. Also, this newly designed circuit solved the biggest problem of conventional flip-flop type level shifter in which the power MOSFET were turned on simultaneously due to the large dv/dt noise. The proposed high side level shifter included switching noise protection circuit and schmmit trigger to minimize the effect of displacement current flowing through LDMOS of level shifter when power MOSFET is operating. The designing process was proved reasonable by conducting Spectre and PSpice simulation on this circuit using 1${\mu}m$ BCD process parameter.

X-Band 6-Bit Phase Shifter with Low RMS Phase and Amplitude Errors in 0.13-㎛ CMOS Technology

  • Han, Jang-Hoon;Kim, Jeong-Geun;Baek, Donghyun
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권4호
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    • pp.511-519
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    • 2016
  • This paper proposes a CMOS 6-bit phase shifter with low RMS phase and amplitude errors for an X-band phased array antenna. The phase shifter combines a switched-path topology for coarse phase states and a switch-filter topology for fine phase states. The coarse phase shifter is composed of phase shifting elements, single-pole double-throw (SPDT), and double-pole double-throw (DPDT) switches. The fine phase shifter uses a switched LC filter. The phase coverage is $354.35^{\circ}$ with an LSB of $5.625^{\circ}$. The RMS phase error is < $6^{\circ}$ and the RMS amplitude error is < 0.45 dB at 8-12 GHz. The measured insertion loss is < 15 dB, and the return losses for input and output are > 13 dB at 8-12 GHz. The input P1dB of the phase shifter achieves > 11 dBm at 8-12 GHz. The current consumption is zero with a 1.2-V supply voltage. The chip size is $1.46{\times}0.83mm^2$, including pads.

A New Level Shifter using Low Temperature poly-Si TFTs

  • Shim, Hyun-Sook;Kim, Jong-Hun;Cho, Byoung-Chul;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.1015-1018
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    • 2004
  • We proposed a new cross-coupled level shifter circuit using low temperature poly-Si(LTPS) TFT. The proposed level shifter can operate on low input voltage in spite of low mobility and widely varying high threshold voltage of LTPS TFT. Also, the proposed level shifter operates at high frequency and reduces power consumption for having fast rising and falling time and shortening period flowing short-circuit currents.

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Dynamic-Voltage/Frequency-Scaling 알고리즘에서의 다중 인가 전압 조절 시스템 용 High-speed CMOS Level-Up/Down Shifter (A Novel High-speed CMOS Level-Up/Down Shifter Design for Dynamic-Voltage/Frequency-Scaling Algorithm)

  • 임지훈;하종찬;위재경;문규
    • 대한전자공학회논문지SD
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    • 제43권6호
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    • pp.9-17
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    • 2006
  • SoC(System-On-Chip) 시스템에서 초 저전력 시스템을 구현하기 위한 dynamic voltage and frequency scaling (DVFS)알고리즘에 사용될 시스템 버스의 다중 코어 전압 레벨을 생성해주는 새로운 다계층(multi-level) 코어 전압용 high-speed level up/down Shifter 회로를 제안한다. 이 회로는 내부 회로군과 외부 회로군 사이에서 서로 다른 전압레벨을 조정 접속하는 I/O용 level up/down shifter interface 회로로도 동시에 사용된다. 제안하는 회로는 인터페이스 접속에서 불가피하게 발생하는 속도감쇄와 Duty Ratio 불안정 문제를 최소화하는 장점을 갖고 있다. 본 회로는 500MHz의 입력 주파수에서 $0.6V\sim1.6V$의 다중 코어 전압을 각 IP들에서 사용되는 전압레벨로, 또는 그 반대의 동작으로 서로 Up/Down 하도록 설계하였다 그리고 제안하는 I/O 용 회로의 level up shifter는 500MHz의 입력 주파수에서 내부 코어 용 level up shifter의 출력전압인 1.6V를 I/O 전압인 1.8V, 2.5V, 3.3V로 전압레벨을 상승 하도록 설계하였으며, level down shifter는 반대의 동작으로 1Ghz의 입력 주파수에서 동작하도록 설계하였다. 시뮬레이션 및 결과는 $0.35{\mu}m$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process 와 65nm CMOS model 변수를 이용한 Hspice를 통하여 검증하였다. 또한, 제안하는 회로의 지연시간 및 파워소모 분석과 동작 주파수에 비례한 출력 전압의 Duty ratio 왜곡에 대한 연구도 하였다.

다중전원 SoC용 저전력 단일전원 Level-Up/Down Shifter (Low Power Level-Up/Down Shifter with Single Supply for the SoC with Multiple Supply)

  • 우영미;김두환;조경록
    • 한국콘텐츠학회논문지
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    • 제8권3호
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    • pp.25-31
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    • 2008
  • 본 논문은 다중전원공급 SoC(System-on-Chip)에 사용될 저전력 단일전원 level-up/down shifter를 제안한다. 제안된 회로는 다양한 전원을 사용하는 IP간의 신호의 인터페이스 회로로 사용할 수 있으며, 단일전원을 사용함으로써 저전력으로 동작하고 시스템의 전원배선과 레이아웃의 복잡도 및 지연시간이 감소하는 장점을 가지고 있다. 제안된 level-up/down shifter는 각각 IP간에 신호들이 level-up 일 때는 500MHz 입력 주파수에서 동작하고 level-down일 때는 1GHz에서 동작하도록 설계했다. I/O 회로에 level-up/down shifter를 사용하면 시스템간의 신호를 연결할 때 잡음에 강하다는 사실도 검증했다. 시뮬레이션 결과는 0.18um CMOS 공정에서 각각 1.8V, 2.5V, 3.3V의 전원을 사용하여 검증했다.

65nm CMOS 스위칭-증폭기를 이용한 60GHz 능동위상변화기 설계 (A 60GHz Active Phase Shifter with 65nm CMOS Switching-Amplifiers)

  • 최승호;이국주;최정환;김문일
    • 전기전자학회논문지
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    • 제14권3호
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    • pp.232-235
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    • 2010
  • 기존의 수동 스위치를 사용한 스위치-라인 타입 위상변화기의 수동 스위치를 스위칭 증폭기로 대체한 60GHz CMOS 능동위상변화기를 소개하였다. 능동스위치 위상변화기는 능동스위치 블록과 수동 딜레이 네트워크 블록 구성되며, 기존의 vector-sum 위상변화기와 비교해 간단한 회로 구성이 가능하다. 능동스위치 블록은 On-Off state에 따라 다르게 요구되는 입출력 저항을 고려하여 설계하였고, 수동 딜레이 네트워크 블록은 회로의 크기를 최소화하기 위하여 일반적인 microstrip line 대신 lumped 인덕터와 커패시터를 사용하여 구성하였다. TSMC 65nm CMOS 공정을 이용하여 1-bit 위상변화기를 제작 및 측정하였으며, 그 결과 65GHz에서 평균 -4.0dB 의 삽입손실과 120도의 위상차를 얻었다.