• 제어로봇시스템학회논문지
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• 제21권9호
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• pp.875-880
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• 2015

Traditional semiconductor process control has been performed through statistical process control techniques in a constant process-recipe conditions. However, the complexity of the interior of the etching apparatus plasma physics, quantitative modeling of process conditions due to the many difficult features constraints apply simple SISO control scheme. The introduction of the Advanced Process Control (APC) as a way to overcome the limits has been using the APC process control methodology run-to-run, wafer-to-wafer, or the yield of the semiconductor manufacturing process to the real-time process control, performance, it is possible to improve production. In addition, it is possible to establish a hierarchical structure of the process control made by the process control unit and associated algorithms and etching apparatus, the process unit, the overall process. In this study, the research focused on the methodology and monitoring improvements in performance needed to consider the process management of future developments in the semiconductor manufacturing process in accordance with the age of the APC analysis in real applications of the semiconductor manufacturing process and process fault diagnosis and control techniques in progress.

• 산업경영시스템학회지
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• 제39권1호
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• pp.153-161
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• 2016

Semiconductor manufacturing has suffered from the complex process behavior of the technology oriented control in the production line. While the technological processes are in charge of the quality and the yield of the product, the operational management is also critical for the productivity of the manufacturing line. The fabrication line in the semiconductor manufacturing is considered as the most complex part because of various kinds of the equipment, re-entrant process routing and various product devices. The efficiency and the productivity of the fabrication line may give a significant impact on the subsequent processes such as the probe line, the assembly line and final test line. In the management of the re-entrant process such as semiconductor fabrication, it is important to keep balanced fabrication line. The Performance measures in the fabrication line are throughput, cycle time, inventory, shortage, etc. In the fabrication, throughput and cycle time are the conflicting performance measures. It is very difficult to achieve two conflicting goal simultaneously in the manufacturing line. The capacity of equipment is important factor in the production planning and scheduling. The production planning consideration of capacity can make the scheduling more realistic. In this paper, an input and scheduling rule are to achieve the balanced operation in semiconductor fabrication line through equipment capacity and workload are proposed and evaluated. New backward projection and scheduling rule consideration of facility capacity are suggested. Scheduling wafers on the appropriate facilities are controlled by available capacity, which are determined by the workload in terms of the meet the production target.

• 한국표면공학회지
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• 제57권3호
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• pp.165-178
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• 2024

In semiconductor memory device manufacturing, the capability for high aspect ratio contact (HARC) etching determines the density of memory device. Given that there is no standardized definition of "high" in high aspect ratio, it is crucial to continuously monitor recent technology trends to address technological gaps. Not only semiconductor memory manufacturing companies such as Samsung Electronics, SK Hynix, and Micron but also semiconductor manufacturing equipment companies such as Lam Research, Applied Materials, Tokyo Electron, and SEMES release annual reports on HARC etching technology. Although there is a gap in technological focus between semiconductor mass production environments and various research institutes, the results from these institutes significantly contribute by demonstrating fundamental mechanisms with empirical evidence, often in collaboration with industry researchers. This paper reviews recent studies on HARC etching and the study of dielectric etching in various technologies.

• 한국생산제조학회지
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• 제22권3호
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• pp.356-363
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• 2013

Mechanical molding press which is used for transformation process during semiconductor manufacturing process has structural deformations by pressure. If these deformations have over limit range, life of the press itself can be reduced and it will be exerted on a bad effect for quality of the semiconductor. In this research, the main plates and links of a press are analyzed in relation to the structural deformations caused by pressure excluding thermal deformations. After modifying the modeling, the analysis is performed again to determine optimal design of the press, and this design is introduced to ensure that most of the stresses on the main plates are within safe allowable limits. As a result, an optimal design method for the structure is investigated to produce the desired pressure even when the size of the main structure is minimized.

• Korean Chemical Engineering Research
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• 제46권3호
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• pp.571-580
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• 2008

반도체 제조 공정 중에 광범위하게 사용되고 있는 많은 프로세스 공정들이 있음에도 화학공학 측면에서 반도체 산업이 어떤 상황이며 실질적으로 어떤 문제들을 가지고 있는가에 대한 학문적 접근은 다루어지지 못했다. 본 연구에서는 반도체 산업 중 반도체의 공급 사슬망 관리(Supply Chain Management) 부분을 집중적으로 분석하여 공정 시스템공학이나 화학공학에서 어떻게 기여할 수 있을까에 대해 살펴보고자 한다. 반도체 관련 기업에서의 근무 경험과 연구결과를 바탕으로 관련 사례와 자료들을 통해 주요 개념들을 소개하고 향후 발전 방향을 제안하였다.

• 산업경영시스템학회지
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• 제33권3호
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• pp.184-191
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• 2010

In the environment of 450mm wafers production known as the next-generation semiconductor production process, one of the most significant features is the full automation over the whole manufacturing processes involved. The full automation system for 450mm wafer production will minimize the human workers' involvement in the manufacturing process as much as possible. In addition, since the importance of an individual wafer processing increases noticeably, it is necessary to develop more robust scheduling systems in the whole manufacturing process than so ever. The scheduling systems for the next-generation semiconductor production processes also should be capable of monitoring individual wafers and collecting useful data on them in real time. Based on the information gathered from these processes, the system should finally have a real-time scheduling functions controlling whole the semiconductor manufacturing processes. In this study, preliminary investigations on the requirements and needed functions for constructing the real time scheduling system and transforming manufacturing environments for 300mm wafers to those of 400mm are conducted and through which the next generation semiconductor processes for efficient scheduling in a clustered production system architecture of the scheduler is proposed. Our scheduling architecture is composed of the modules for real-time scheduling, the clustered production type supporting, the optimal scheduling and so on. The specifications of modules to define the major required functions, capabilities, and the relationship between them are presented.

• 산업공학
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• 제21권2호
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• pp.151-160
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• 2008

Defect size distribution is a probability density function for the defects that occur on wafers or glasses during semiconductor/LCD fabrication. It is one of the most important information to estimate manufacturing yield using well-known statistical estimation methods. The defects are detected by automatic optical inspection (AOI) facilities. However, the data that is provided from AOI is not accurate due to resolution of AOI and its defect detection mechanism. It causes distortion of defect size distribution and results in wrong estimation of the manufacturing yield. In this paper, I suggest a size conversion method and a maximum likelihood estimator to overcome the vague defect size information of AOI. The methods are verified by the Monte Carlo simulation that is constructed as similar as real situation.

• 산업융합연구
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• 제12권2호
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• pp.16-23
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• 2014

The aim of this study is to find the strategic industries that fulfills the on-site demands of the Gyeonggi province region related to the advancement and development of the local industries. As the results of the analysis, the 4 major strategic industries in the Gyeonggi province region were determined to be (1) electronic component, computer, visual, acoustic and telecommunication equipment manufacturing, (2) pulp, paper and paper product manufacturing, (3) medical substances and pharmaceutical product manufacturing, and (4) rubber and plastic product manufacturing. The industry of concordance between the 4 major strategic industry of the Gyeonggi province determined in this Study and the 13 future growth engine industry of Korea was the area of intelligent semiconductor. Accordingly, it was analyzed that there is a need to strategically cultivate the electrical and electronic telecommunication device industry, which is ranked the $1^{st}$among the strategic industries of Gyeonggi province by generating synergic effects with the policy of the government for nurturing of intelligent semiconductor industry.

• 반도체디스플레이기술학회지
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• 제22권2호
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• pp.81-86
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• 2023

Recently, there has been an increased demand for light-emitting diode (LED) due to the growing emphasis on environmental protection. However, the use of GaN-based sapphire in LED manufacturing leads to the generation of defects, such as dislocations caused by lattice mismatch, which ultimately reduces the luminous efficiency of LEDs. Moreover, most inspections for LED semiconductors focus on evaluating the luminous efficiency after packaging. To address these challenges, this paper aims to detect defects at the wafer stage, which could potentially improve the manufacturing process and reduce costs. To achieve this, image processing and deep learning-based defect detection techniques for Sapphire Epi-Wafer used in Green LED manufacturing were developed and compared. Through performance evaluation of each algorithm, it was found that the deep learning approach outperformed the image processing approach in terms of detection accuracy and efficiency.

• 반도체디스플레이기술학회지
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• 제2권3호
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• pp.1-6
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• 2003

In the rapid changes of the semiconductor manufacturing technologies for early 21st century, it may be safely said that a kernel of terms is the size increase of Si wafer and the size decrease of semiconductor devices. As the size of Si wafers increases and semiconductor device is miniaturized, the units of cleaning processes increase. A present cleaning technology is based upon RCA cleaning which consumes vast chemicals and ultra pure water (UPW) and is the high temperature process. Therefore, this technology gives rise to environmental issue. To resolve this matter, candidates of advanced cleaning processes have been studied. One of them is to apply the electrolyzed water. In this work, electrolyzed water cleaning was compared with various chemical cleaning, using Si wafer surfaces by changing cleaning temperature and cleaning time, and especially, concentrating upon the contact angle. It was observed that contact angle on surface treated with Electrolyzed water cleaning was $4.4^{\circ}$ without RCA cleaning. Amine series additive of high pKa (negative logarithm of the acidity constant) was used to observe the property changes of cathode water.