• Transactions on Electrical and Electronic Materials
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• 제7권4호
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• pp.173-179
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• 2006

Due to the limitations of the channel length, the lateral spread for two-dimensional impurity distributions is critical for the analysis of devices including the integrated complementary metal oxide semiconductor (CMOS) circuits and high frequency semiconductor devices. The developed codes were then compared with the two-dimensional implanted profiles measured by transmission electron microscope (TEM) as well as simulated by a commercial TSUPREM4 for verification purposes. The measured two-dimensional TEM data obtained by chemical etching-method was consistent with the results of the developed analytical model, and it seemed to be more accurate than the results attained by a commercial TSUPREM4. The developed codes can be applied on a wider energy range $(1KeV{\sim}30MeV)$ than a commercial TSUPREM4 of which the maximum energy range cannot exceed 1MeV for the limited doping elements. Moreover, it is not only limited to diffusion process but also can be applied to implantation due to the sloped and nano scale structure of the mask.

• 한국산업보건학회지
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• 제34권2호
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• pp.125-133
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• 2024

Objectives: The aim of this study is to develop a comprehensive Occupational Safety and Health (OSH) guide for maintenance tasks in semiconductor processing, specifically focusing on etching, deposition, and ion implantation processes. Methods: The development of the OSH guide involved a literature review, consultations with industry experts, and field investigations. It concentrates on Maintenance Work (MW) operations in these specialized areas. Results: The result is a detailed OSH guide tailored to MW in etching, deposition, and ion implantation facilities within semiconductor processing. This guide is structured to assist maintenance workers through pre-, during and post-MW phases, ensuring easy comprehension and adherence to safety protocols. It highlights the necessity of safety and health measures throughout the MW process to protect personnel. The guide is enriched with real-life scenarios and visual aids, including cartoons and photographs, to aid in the understanding and implementation of safety and health principles. Conclusions: This OSH guide is designed to enhance the protection of workers engaged in maintenance activities in the electronics sector, particularly in semiconductor manufacturing. It aims to improve compliance with safety and health standards in these high-risk environments.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.37-40
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• 2001

The semiconductor's design rule becomes more stringent, hence the silicon-dioxide etching technique is important issue. In this work we compared the etching characteristics of different three types of Plasma source, Normal ICP, magnetized ICP and E-IC $P^{TM}$. The E-IC $P^{TM}$ source shows higher etch rate at lower pressure and this is advantageous for the fine pattern process. The etching characteristics were varied with external magnetic field frequency at I-lCP and this is examined with Nanospe $c^{TM}$ and SEM. We designed Langmuir probe system for time resolved diagnosis. ion density of E-ICP is varying periodically with the applied external magnetic field frequencyquency

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2005년도 추계 학술대회
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• pp.59-62
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• 2005

백색 LED 램프를 제조하는 공정에서 램프간의 전기적 개방상태의 절연상태를 유지하기 위해 사파이어 기판 위에 성장된 GaN 계 반도체 에피박막층을 제거하기 위해 유도 결합형 플라즈마 식각 공정을 이용하였다. 4 미크론의 두께를 갖는 GaN 층을 식각하는데 있어 식각 방지 마스킹 물질로 포토레지스트, $SiO_2,\;Si_{3}N_4$ 및 $Al_{2}O_3$를 시험하였다. 동일한 전력 및 가스유량상태에서 $Al_{2}O_3$만 에피층을 보호할 수 있음을 확인하였다.

• 반도체디스플레이기술학회지
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• 제15권2호
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• pp.32-37
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• 2016

Sidewall angle (SWA) of an absorber stack in extreme ultraviolet lithography mask is considered to be $90^{\circ}$ ideally, however, it is difficult to obtain $90^{\circ}$ SWA because absorber profile is changed by complicated etching process. As the imaging performance of the mask can be varied with this SWA of the absorber stack, more complicated optical proximity correction is required to compensate for the variation of imaging performance. In this study, phase shift mask (PSM) is suggested to reduce the variation of imaging performance due to SWA change by modifying mask material and structure. Variations of imaging performance and lithography process margin depending on SWA were evaluated through aerial image and developed resist simulations to confirm the advantages of PSM over the binary intensity mask (BIM). The results show that the variations of normalized image log slope and critical dimension bias depending on SWA are reduced with PSM compared to BIM. Process margin for exposure dose and focus was also improved with PSM.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.203-203
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• 2014

Due to the electrical properties such as narrow bandgap and high carrier mobility, indium antimonide (InSb) has attracted a lot of attention recently. For the fabrication of electronic or photonic devices, an etching process is required. However, during etching process, enegetic ions can induce structural damages on the bombarded surface. Especially, InSb has a very weak binding energy between In atom and Sb stom, it can be easily damaged by impingement of ions. In the previous work, to evaluate the surface properties after Ar ion beam etching, the plasma-induced structural damage on the etched InSb(100) surface had been examined by resonant Raman spectroscopy. As a result, we demonstrated the relation between the enhanced transverse optical(TO) peak in the Raman spectrum and the ion-induced structral damage near the InSb surface. In this work, the annealing effect on the etched InSb(100) surface has investigated. Annealing process was performed at $450^{\circ}C$ for 10 minute under antimony ambient. As-etched InSb(100) surface had shown a strongly enhanced TO scattering intensity in the Raman spectrum. However, the annealing process with antimony flowing caused the intensity to recover due to the structural reordering and the reduction of antimony vacancies. It proves that the origin of enhanced TO scattering is Sb vacancies. Furthermore, it shows that etching-induced damage can be cured effectively by the following annealing process under Sb ambient.

• 전자공학회논문지A
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• 제33A권5호
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• pp.108-116
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• 1996

A semiconductor process imulator operated in windows$^{TM}$ environment has been developed. two-dimensional process simulation in personal computer has been enabled due to the improvement of CPU speed and the efficient use of memory. The process simulator in this paper is capable of calculating diffusion, oxidation, ion implantation, etching and deposition in two-dimensional manner. In addition, graphic-user-friendly editor, parser, and multi-dimensional graphical routine is also available in the devloped simulator.

• 반도체디스플레이기술학회지
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• 제20권1호
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• pp.59-63
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• 2021

Upper electrode is one of core parts using plasma etching process at semiconductor. The purpose of this study is to analyze effects of cutting conditions for mechanical machining of silicon upper electrode. For this research, surface roughness of machined workpiece and depth of damage inside of silicon electrode are experimented and analyzed and different values of feed rate and depth of cut are applied for the experiments. From these experiments, it is verified that the surface roughness and internal damaged layer get worse according to take more fast feed rate. In conclusion, cutting condition is very important factor for machining. Results of this study can use to develop various parts which are made from single crystal silicon and affect various benefits to the semiconductor industry for better productivity.

• 한국반도체및디스플레이장비학회:학술대회논문집
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• 한국반도체및디스플레이장비학회 2004년도 춘계학술대회 발표 논문집
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• pp.92-96
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• 2004

Scales, accumulated on semiconductor equipment parts during device fabrication processes, often lower equipment lifetime and production yields. Thus, many equipments parts have be cleaned regularly. In this study, an attempt to establish an effective process for the removal of scales on the sidewall of collimators in the chamber of sputter is made. The EDX analysis revealed that the scales are composed of Ti and TiN with the colummar structure. It was found that the heat-treatment at 700 for 1 min. after the oxide removal in the HF solution, and then etching in the HNO3 : H2SO4 : H2O =4:2:4 solution for 5.5 hrs at 67 was the most effective process for the scale removal.

• 전기전자학회논문지
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• 제19권4호
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• pp.541-547
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• 2015

현재 반도체 제조 공정에서 집적회로의 소자 크기가 점점 작아짐에 따라 플라즈마 식각 공정에서의 식각 종료점 검출이 더 어려워지고 있다. 식각 종료점 검출은 위해서는 반도체 장비에 다양한 종류의 센서를 설치하고 이 센서를 통해 데이터를 얻고 분석해야 한다. 기존의 식각 종료점 검출 방식은 주로 By-product의 OES 데이터를 분석하여 진행되었는데 본 연구에서는 By-product 와 Etchant gas 의 OES 데이터를 함께 분석하여 식각 종료점 검출 결과에 신뢰성을 더 높이고자 하였다. 또한, 데이터 분석을 위해 OES-SNR, PCA, Polynomial Regression, eHMM 등의 기법들을 사용하여 진행하였다.