• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.387-392
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• 2018

Static characteristics of SiC (silicon carbide) lateral p-i-n diodes implemented on semi-insulating substrate without an epitaxial layer are inVestigated. On-axis SiC HPSI (high purity semi-insulating) and VDSI (Vanadium doped semi-insulating) substrates are used to fabricate the lateral p-i-n diode. The space between anode and cathode ($L_{AC}$) is Varied from 5 to $20{\mu}m$ to inVestigate the effect of intrinsic-region length on static characteristics. Maximum breakdown Voltages of HPSI and VDSI are 1117 and 841 V at $L_{AC}=20{\mu}m$, respectiVely. Due to the doped Vanadium ions in VDSI substrate, diffusion length of carriers in the VDSI substrate is less than that of the HPSI substrate. A forward Voltage drop of the diode implemented on VDSI substrate is 12 V at the forward current of $1{\mu}A$, which is higher than 2.5 V of the diode implemented on HPSI substrate.

• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.4
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• pp.35-40
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• 1975

The Zn7e-lnSb heterojunctions was prepared by interface alloying technique. The structure of this beterojunction had p-i-n which semi-insulating ZnTe laver at interface of this heterojunction was formed by diffusing In of InSb into ZnTe crystal. The current transport mechanism of this heterojunction was Spacecharge-Limited-Current(SCLC) mechanism by hole at semi-insulating ZnTe layer. The hole wart injected from valence band of p- type SnTe crystal. Orange color electroluminescence was observed at this heterojunction when forward and reversed bias voltage applied.

• JSTS:Journal of Semiconductor Technology and Science
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• v.15 no.2
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• pp.243-248
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• 2015

We prepared semi-insulating CdTe for radiation detectors by isothermal annealing of single crystals grown by Bridgeman technique in a sealed quartz container filled with Sn vapor. The resistivity of CdTe:Sn samples thus obtained was of order of $10^{10}Ohm{\cdot}cm$ at room temperature with electrons lifetime of $2{\times}10^{-8}$ s, which is appropriate for the applications desired. Analysis of electric transport characteristics depending on temperature, sample thickness and voltage applied revealed the presence of traps with concentration of about $(4-5){\times}10^{12}cm^{-3}$ with the corresponding energy level at 0.8 - 0.9 eV counted from the bottom of conduction band. The conductivity was determined by electron injection from electrodes in space charge limited current mode.

• Electrical & Electronic Materials
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• v.10 no.8
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• pp.800-806
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• 1997

The behavior of de levels in rapid thermal annealed Fe-doped semi-insulating InP(100) was studied by photoinduced current transient spectrocopy(PICTS). In bulk InP, T2(Ec-0.24 eV), T3(Ec-0.30 eV) and T5(Ec-0.62 eV) traps were observed. After annealing the T2 trap was annihilated at 20$0^{\circ}C$ and recreated at 35$0^{\circ}C$. T3 trap was not affected below 40$0^{\circ}C$. With increasing temperature the concentration of T5 trap reduced and it was annihilated at 30$0^{\circ}C$. However the T1(Ec-0.16 eV) and T4(Ec-0.42 eV) traps were began to appear at 40$0^{\circ}C$and these concentrations were increased with annealing temperature. The T1 and T4 traps seem to be related to the isolated phosphorus vacancy( $V_{p}$) and $V_{p}$-indium antisite( $V_{p}$- $P_{in}$ ) or $V_{p}$-indium interstitial( $V_{p}$-I $n_{I}$) respectiely.respectiely.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.25 no.9B
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• pp.1635-1640
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• 2000

In this paper, a 18 GHz oscillator is designed with the push-push method an fabricated by semi-MMIC process, in which the second harmonic is the main output signal with the suppressed fundamental mode. In semi-MMIC process, passive components with microstrip transmission line are implemented using MMIC process on semi-insulating GaAs substrate. Then, chip types of P-HEMT, resistors, and capacitors are connected through Au wire-bonding. Also, the ground plane is inserted around the circuit and connected each other with the back-side of substrate through Au wire-bonding instead of via-hole. The semi-MMIC push-push oscillator shows the output powder of -10.5 dBm, the fundamental frequency suppression of -17.3 dBc/Hz, and the phase noise of -97.9 dBc/Hz at the offset frequency of 100 kHz.

• Journal of Sensor Science and Technology
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• v.8 no.5
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• pp.421-426
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• 1999

In this paper, we present p-channel GaAs MOSFET having $Al_2O_3$ as gate insulator fabricated on a semi-insulating GaAs substrate, which can be operated in the depletion mode. $1\;{\mu}m$ thick undoped GaAs buffer layer, $4000\;{\AA}$ thick p-type GaAs epi-layer, undoped $500{\AA}$ thick AlAs layer, and $50\;{\AA}$ thick GaAs cap layer were subsequently grown by molecular beam epitaxy(MBE) on (100) oriented semi-insulating GaAs substrate and this wafer was oxidized. AlAs layer was fully oxidized as a $Al_2O_3$ thin film. The I-V, $g_m$, breakdown charateristics of the fabricated GaAs MOSFET showed that wet thermal oxidation of AlAs/GaAs epilayer/S I GaAs was successful in realizing depletion mode p-channel GaAs MOSFET.

• Journal of the Korean Vacuum Society
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• v.6 no.3
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• pp.249-254
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• 1997

We investigated characteristics of Fe-doped semi-insulating InP by means of photoreflectance(PR) measurement. The band gap energy($E_0$) and broadening parameter($\Gamma$) from PR signals at 300K are 1.336 eV and 11.2 meV, respectively. As the temperature is decreased from 300 to 80 K, PR signals are varied from an overlapped shape of exciton and 2-dimensional band gap transitions(300 K) to that of exciton transition(80 K). We calculated Varshni coefficient($\alpha=0.94\pm$0.07 meV/K, $\beta=587\pm$35.2 K) and Bose-Einstein coefficient ($a_B=33.6{\pm}2.02meV$ , $\theta=165\pm$33K). After annealing of isothermal and isochronism crystallinity of InP is found to be excellent when annealed at $300^{\circ}C$ for 10~20 min, qualitatively.

• Proceedings of the Optical Society of Korea Conference
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• 1991.06a
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• pp.190-193
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• 1991

The monolithically integrated receiver OEIC using InGaAs/InP PIN PD, junction FET's and bias resistor has been fabricated on semi-insulating InP substrate. The fabrication process is highly compatible between PD and self-aligned JFET, and reduction in gate length is achieved using an anisotropic selective etching and a non-planar OMVPE process. The PIN photodetector with a 80 ${\mu}{\textrm}{m}$ diameter exhibits current of less than 5 nA and a capacitance of about 0.35 pF at -5 V bias voltage. An extrinsic transconductance and a gate-source capacitance of the JFET with 4 ${\mu}{\textrm}{m}$ gate length (gate width = 150 ${\mu}{\textrm}{m}$) are typically 45 mS/mm and 0.67 pF at 0 V, respectively. A voltage gain of the pre-amplifier is 5.5.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.34D no.7
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• pp.56-61
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• 1997

I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A $l_{0.48}$As pseudomorphic high electron mobility transistor (P-HEMT) structures were grown on semi-insulating InP substrates by molecular beam epitzxy method. The hall effect measuremetn was used to measure the electrical properties and the photoluminescence (PL) measurement was used to measure the electrical properties and the photoluminescence(PL) measurement for optical propety. By the cross-sectional transmission electron microscopy (XTEM) investigation of the V and X shape defects including slip with angle of 60.deg. C and 120.deg. C to surface in the sampel, the defects formation mecahnism in the I $n_{0.52}$A $l_{0.48}$As epilayers on InP substrates could be explained with the different thermal expansion coefficients between I $n_{0.52}$A $l_{0.48}$As epilayers and InP substrate.d InP substrate.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.695-701
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• 2016

Be-doped GaSb layers were grown on highly mismatched semi-insulating GaAs substrate (001) with $2^{\circ}$ offcut towards <110> at low growth temperature, by molecular beam epitaxy (MBE). The influence of Be doping on the crystallographic quality, surface morphology, and electrical properties, was assessed by X-ray diffraction, Nomarski microscopy, and Hall effect measurements, respectively. Be impurities are well behaved acceptors with hole concentrations as high as $9{\times}10^{17}cm^{-3}$. In addition, the reduction of GaSb lattice parameter with Be doping was studied.