• Title/Summary/Keyword: Selection circuit

Search Result 194, Processing Time 0.017 seconds

Digital Data Communication System for Mobile Network System Using CC1020 Chip (CC1020 Chip을 사용한 모바일 네트워크를 위한 디지털 데이터 통신 시스템)

  • Lim, Hyun-Jin;So, Heung-Kuk
    • Journal of the Institute of Convergence Signal Processing
    • /
    • v.8 no.1
    • /
    • pp.58-62
    • /
    • 2007
  • Digital communication is important for reliability and mobilization of the multi-channel communication systems. Transmitting and receiving data for the mobilization should be possible in anywhere and in anytime. And this system must be designed light weight small size and low power. One are essential technology for implementing the mobile wireless communication system on the age of ubiquotos. Requirements in constructing such communication field are followings. At first data transmitting and receiving should be carried out by a simple command. Second, the device should be designed as hand-hold type and low power consumption. Third, data communication should be reliable. As one of examples, car to car system which is popular in the market is introduced here, All traffic information in highway is transmitted from one car to another by using this system which can prevent possible traffic accident. This paper shows the design of a digital data communication system with CC1020 chip. This CC1020 makes easy frequency selection and easy switch from the transmit mode to the receive mode by simple setting of a memory register in the chip. The transmit power of this system is designed 10dBm and its communication range is about 100m. The power supplied this system is 3V considered as low power. The sleep mode can be easily entered during transmit mode or receive mode. We shows the program algorithm of CC1020 and interface circuit between MCU and CC1020. We shows the Photo of the CC1020 Module and Atmega128 Module.. We analysed the receiver rate with this system.

  • PDF

Design and Fabrication of the Cryogenically Cooled LNA Module for Radio Telescope Receiver Front-End (전파 망원경 수신기 전단부용 극저온 22 GHz 대역 저잡음 증폭기 모듈 설계 및 제작)

  • Oh Hyun-Seok;Lee Kyung-Im;Yang Seong-Sik;Yeom Kyung-Whan;Je Do-Heung;Han Seog-Tae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
    • /
    • v.17 no.3 s.106
    • /
    • pp.239-248
    • /
    • 2006
  • In this paper, the cryogenically cooled low noise amplifier module for radio telescope receiver front-end using pHE-MT MMIC is designed and fabricated. In the selection of MMIC, the MMIC fabricated with the pHEMTS providing successful cryogenic operation are chosen. They are mounted in the housing using the thin film substrate. In the design of the housing, the absorber and the elimination of the gap between the carrier and the housing as well removed the unnecessary oscillations by its structure. The mismatch is improved by ribbon-tuning to provide the best performance at room temperature. The fabricated module shows the gain of $35dB{\pm}1dB$ and the noise figure of $2.37{\sim}2.57dB$ at room temperature over $21.5{\sim}23.5GHz$. In the cryogenic temperature of $15^{\circ}K$ cooled by He gas, the measured gain was above 35 dB and flatness ${\pm}2dB$ and the noise temperatures of $28{\sim}37^{\circ}K$.

Study on the Standardization of Management Form through Integrated Management of CCTV (CCTV 통합관리를 위한 관리대장 표준화 연구)

  • PARK, Jeong-Woo;LEE, Seong-Ho;NAM, Kwang-Woo
    • Journal of the Korean Association of Geographic Information Studies
    • /
    • v.19 no.2
    • /
    • pp.63-72
    • /
    • 2016
  • Closed-circuit television(CCTV) is a facility that forms the backbone of the ubiquitous services provided by the Integrated Management Center of the Ministry of Land, Infrastructure and Transport and the Integrated Control Center of the Ministry of the Interior. However, it is installed and managed according to different laws, as it is operated and managed by each department. Moreover, because there are no regulatory grounds for unified management of CCTV, each municipality responsible for the actual management manages it based on the individual standards of each department. Thus, the purpose of this study is to develop a standardized management form to establish an integrated management plan. The author inspected the existing situation by examining the legal system and public data and through hands-on worker interviews, and discovered the managed element by reviewing the specifications of the bidding system. The management form for integrated management comprises the above requirements along with the management histories and linkage of intelligent facilities. A uniform management form for integrated management containing specifications of the CCTVs installed by various departments is created, and is easily searched for facilities to check requirements for joint use. The result of this study can contribute to building the database of facility management system for integrated management of facilities at the integrated management center as well as for a detailed simulation of the selection of location of CCTV depending on the CCTV's specifications.

Active-RC Channel Selection Filter with 40MHz Bandwidth and Improved Linearity (개선된 선형성을 가지는 R-2R 기반 5-MS/s 10-비트 디지털-아날로그 변환기)

  • Jeong, Dong-Gil;Park, Sang-Min;Hwang, Yu-Jeong;Jang, Young-Chan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.19 no.1
    • /
    • pp.149-155
    • /
    • 2015
  • This paper proposes 5-MS/s 10-bit digital-to-analog converter(DAC) with the improved linearity. The proposed DAC consists of a 10-bit R-2R-based DAC, an output buffer using a differential voltage amplifier with rail-to-rail input range, and a band-gap reference circuit for the bias voltage. The linearity of the 10-bit R-2R DAC is improved as the resistor of 2R is implemented by including the turn-on resistance of an inverter for a switch. The output voltage range of the DAC is determined to be $2/3{\times}VDD$ from an rail-to-rail output voltage range of the R-2R DAC using a differential voltage amplifier in the output buffer. The proposed DAC is implemented using a 1-poly 8-metal 130nm CMOS process with 1.2-V supply. The measured dynamic performance of the implemented DAC are the ENOB of 9.4 bit, SNDR of 58 dB, and SFDR of 63 dBc. The measured DNL and INL are less than +/-0.35 LSB. The area and power consumption of DAC are $642.9{\times}366.6{\mu}m^2$ and 2.95 mW, respectively.