• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.10
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• pp.89-100
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• 2018

The precedent study stage of defense programs is a project stage that is conducted to support the determination of an efficient acquisition method of the weapon system determined by the requirement. In this study, the FTA/FMEA technique was used in the safety analysis process to identify elements to be conducted in the precedent study stage and a methodology for deriving the key review elements through conceptualization and tailoring was suggested. To supplement the key elements derived from the existing research, it is necessary to analyze various events that may arise from key elements. To accomplish this, the HAZOP technique for safety analysis in other industrial fields was used to supplement the results of kdy element derivation. We analyzed and modeled the execution procedure by establishing input/output information and association with the key elements of the precedent study stage derived by linking HAZOP/FTA/FMEA techniques. In addition, performance maturity was evaluated for performance of precedent study, and a risk-based response manual was generated based on inter-working information with key elements with low maturity. Based on the results of this study, it is possible to meet the performance, cost, and schedule of the project implementation through application of the key elements and procedures and the risk management response manual in the precedent study stage of the defense program.

• Journal of KIISE:Computer Systems and Theory
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• v.35 no.9_10
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• pp.429-440
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• 2008

As embedded system becomes more complex, software development becomes more important in the entire design process. Most embedded applications consist of multi -tasks, that are executed in parallel. So, dataflow model that expresses concurrency naturally is preferred than sequential programming language to develop multitask software. For the execution of multitasking codes, operating system is essential to schedule multi-tasks and to deal with the communication between tasks. But, it is needed to execute multitasking code without as when the target hardware platform cannot execute as or target platforms are candidates of design space exploration, because it is very costly to port as for all candidate platforms of DSE. For this reason, we propose the serialized multitasking code generation technique from dataflow specification. In the proposed technique, a task is specified with dataflow model, and generated as a C code. Code generation consists of two steps: First, a block in a task is generated as a separate function. Second, generated functions are scheduled by a multitasking scheduler that is also generated automatically. To make it easy to write customized scheduler manually, the data structure and information of each task are defined. With the preliminary experiment of DivX player, it is confirmed that the generated code from the proposed framework is efficiently and correctly executed on the target system.

• International Commerce and Information Review
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• v.15 no.2
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• pp.261-283
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• 2013

ISBP745 has new provisions about sea waybill, road, rail or inland waterway transport documents which ISBP681 did not have provisions about. The main revisions of ISBP745 which were not existent or different from ICC Opinion are as follows: First, where B/L is required when multimodal transport is used as a modes of transport, the revisions stipulates that it is subject to UCP600 article19. this differs from previous ICC Opinion. Second, when a credit requires a transport document to indicate the name, address and contact details of a delivery agent, for the place of final destination or port of discharge, the address need not be one that is located at the place of destination or port of discharge or within the same country as that of the place of destination or port of discharge. Third, in case there exist a number of shippers and a consignee, multiple transport documents are issued. This rule has a clear stipulation on this case. Transport industry regards the indication of "LCL/FCL" or "CFS/CY" common in this case as that requiring multiple transport documents. However, ISBP745 does not regard it the case as that requiring multiple transport documents. This may cause some confusion in examination of documents. Forth, when partial shipment is allowed, and more than one set of original transport documents are presented as part of a single presentation made under one covering schedule and incorporate different dates of shipment, the earliest of these dates is to be used of the calculation of an presentation period.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.188-198
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• 2013

In order to increase its performance, NAND flash memory-based storage is composed of data buses that are shared by a number of flash memories and uses a parallel technique that can carry out multiple flash memory operations simultaneously. Since the storage performance is strongly influenced by the performance of each data bus, it is important to improve the utilization of the bus by ensuring effective scheduling of operations by the storage controller. However, this is difficult because of dynamic changes in buses due to the unique characteristics of each operation with different timing, cost, and usage by each bus. Furthermore, the scheduling technique for increasing bus utilization may cause unanticipated operation delay and wastage of storage resource. In this study, we suggest various dynamic operation scheduling techniques that consider data bus performance and storage resource efficiency. The proposed techniques divide each operation into three different stages and schedule each stage depending on the characteristics of the operation and the dynamic status of the data bus. We applied the suggested techniques to the controller and verified them on the FPGA platform, and found that program operation decreased by 1.9% in comparison to that achieved by a static scheduling technique, and bus utilization and throughput was approximately 4-7% and 4-19% higher, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.3
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• pp.116-126
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• 2015

In a distributed heterogeneous computing system, the performance of a parallel application greatly depends on its task scheduling algorithm. Therefore, in order to improve the performance, it is essential to consider some factors that can have effect on the performance of the parallel application in a given environment. One of the most important factors that affects the total execution time is a critical path. In this paper, we propose the CLTS algorithm for a task scheduling. The CLTS sets the priorities of all nodes to improve overall performance by applying leveling method to improve parallelism of task execution and by reducing the delay caused by waiting for execution of critical nodes in priority phase. After that, it conditionally uses insertion based policy or duplication based policy in processor allocation phase to reduce total schedule time. To evaluate the performance of the CLTS, we compared the CLTS with the DCPD and the HCPFD in our simulation. The results of the simulations show that the CLTS is better than the HCPFD by 7.29% and the DCPD by 8.93%. with respect to the average SLR, and also better than the HCPFD by 9.21% and the DCPD by 7.66% with respect to the average speedup.

• Journal of Intelligence and Information Systems
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• v.14 no.4
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• pp.31-46
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• 2008

A stacking yard of a container terminal is a space for temporarily storing the containers that are carried in or imported until they are carried out or exported. If the containers are stacked in an inappropriate way, the efficiency of operation at the time of loading decreases significantly due to the rehandlings. The remarshaling is the task of rearranging containers during the idle time of transfer crane for the effective loading operations. This paper proposes a method of planning for remarshaling in a yard block of an automated container terminal. Our method conducts a search in two stages. In the first stage, the target stacking configuration is determined in such a way that the throughput of loading is maximized. In the second stage, the crane schedule is determined so that the remarshaling task can be completed as fast as possible in moving the containers from the source configuration to the target configuration. Simulation experiments have been conducted to compare the efficiency of loading operations before and after remarshaling. The results show that our remarshaling plan is really effective in increasing the efficiency of loading operation.

• Journal of Korean Society for Geospatial Information Science
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• v.19 no.4
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• pp.119-126
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• 2011

During precise survey on the top of High rise buildings and civil structures, optical surveying equipments like a Total Station are not recommended to use because of some reasons that uneasier alignment with reflectors located at the top of building, increasing error depends on increasement of observation distance and unavailable dynamic positioning etc. Recently various GPS positioning methods have been applied to this job however almost of them are post-processing method which is required much longer time during for whole process includes stake-out, cross checking, fixing positions and final inspections. Therefore, in this study, we applied with RTK surveying system which allows stake-out and inspection in realtime to avoid delaying of construction schedule and also applied with Quasi Static RTK measurement and network adjustment to get a high accuracy within a few millimeters in structure positioning to achieve a successful management for process and quality control of the project. As a result, very high accurate surveying for structures within approx. 2mm in realtime has been achieved when surveyor conduct a network adjustment using least square method for 4 base lines created by Quasi Static RTK data and we expect this method will be applied to construction survey for high rise buildings and civil structures in the future.

• Journal of The Korean Association of Information Education
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• v.8 no.3
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• pp.293-303
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• 2004

To follow in change and the development which circumference environment of education are quick even from scene of education students form the structure of knowledge themselves, the place where own lead studying of personal small group studying is emphasized, here upon specialist learning activity there is a wild possibility in the model which is suitable. But, studying of the learning paper was most center mainly the specialist learning activity of existing, it solves a learning problem at unit hour to, the hour was too insufficient to solve and it became plentifully at block time. But, this is to the curriculum operation and or the schedule operation it is when trying to consider the intensive degree of learning the elementary student, a problem point there is. It grasps the strong point and a weak point of specialist learning activity model of existing from the research which consequently, it sees and it applies more efficiently from web base study to establish the instructional strategy for, it composed the modules which strengthen the interaction of learning subject for. Also, unit macro learning and block time learning in order to do to become accomplished at web with studying problem, it will be able to solve inside unit hour in order, specialist teaching-learning system based on the web. It developed, after applied in the electrification S elementary school 5 grades which will reach the result, it analyzed.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.11
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• pp.11-18
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• 2014

Most of the energy efficient MAC protocols for wireless sensor networks (WSNs) are based on duty cycling in a single channel and show competitive performances in a small number of traffic flows; however, under concurrent multiple flows, they result in significant performance degradation due to contention and collision. We propose a multi-channel pipelining (MCP) method for convergecast WSN in order to address these problems. In MCP, a staggered dynamic phase shift (SDPS) algorithms devised to minimize end-to-end latency by dynamically staggering wake-up schedule of nodes on a multi-hop path. Also, a phase-locking identification (PLI) algorithm is proposed to optimize energy efficiency. Based on these algorithms, multiple flows can be dynamically pipelined in one of multiple channels and successively handled by sink switched to each channel. We present an analytical model to compute the duty cycle and the latency of MCP and validate the model by simulation. Simulation evaluation shows that our proposal is superior to existing protocols: X-MAC and DPS-MAC in terms of duty cycle, end-to-end latency, delivery ratio, and aggregate throughput.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.619-630
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• 2003

We present a method of runtime configuration scheduling in reconfigurable SoC design. As a model of computation, we use a popular formal model of computation, hierarchical FSM (HFSM) with synchronous dataflow (SDF) model, in short, HFSM-SDF model. In reconfigurable SoC design with HFSM-SDF model, the problem of configuration scheduling becomes challenging due to the dynamic behavior of the system such as concurrent execution of state transitions (by AND relation), complex control flow (HFSM), and complex schedules of SDF actor firing. This makes it hard to hide configuration latency efficiently with compile-time static configuration scheduling. To resolve the problem, it is necessary to know the exact order of required configurations during runtime and to perform runtime configuration scheduling. To obtain the exact order of configurations, we exploit the inherent property of HFSM-SDF that the execution order of SDF actors can be determined before executing the state transition of top FSM. After obtaining the order information and storing it in the ready configuration queue (ready CQ), we execute the state transition. During the execution, whenever there is FPGA resource available, a new configuration is selected from the ready CQ and fetched by the runtime configuration scheduler. We applied the method to an MPEG4 decoder and IS95 design and obtained up to 21.8% improvement in system runtime with a negligible overhead of memory usage.