• Title/Summary/Keyword: Samsung Electronic

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Design & Verification of 16 Bit RISC Processor (16 비트 RISC 프로세서 설계 및 검증)

  • Jung, Seung-Pyo;Song, Seung-Won;Lee, Dong-Hoon;Kim, Kang-Joo;Cho, Koon-Shik;Park, Ju-Sung
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.423-424
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    • 2008
  • The procedure of design and verification for a 16-bit RISC processor is introduced in this paper. The proposed processor has Harvard architecture and consists of 24-bit address, 5-stage pipeline instruction execution, and internal debug logic. ADPCM vocoder and SOLA algorithm are successfully carried out on the processor made with FPGA.

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Etch resist patterning of printed circuit board by ink jet printing technology (잉크젯 인쇄기술을 이용한 인쇄회로기판의 에칭 레지스터 패터닝)

  • Seo, Shang-Hoon;Lee, Ro-Woon;Kim, Yong-Sik;Kim, Tae-Gu;Park, Sung-Jun;Yun, Kwan-Soo;Park, Jae-Chan;Jeong, Kyoung-Jin;Joung, Jae-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.108-108
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    • 2007
  • Inkjet printing is a non-contact and direct writing associated with a computer. In the industrial field, there have been many efforts to utilize the inkjet printing as a new way of manufacturing, especially for electronic devices. The etching resist used in this process is an organic polymer which becomes solidified when exposed to ultraviolet lights and has high viscosity of 300 cPs at ambient temperature. A piezoelectric-driven ink jet printhead is used to dispense $20-40\;{\mu}m$ diameter droplets onto the copper substrate to prevent subsequent etching. In this study, factors affecting the pattern formation such as printing resolution, jetting property, adhesion strength, etching and strip mechanism, UV pinning energy have been investigated. As a result, microscale Etch resist patterning of printed circuit board with tens of ${\mu}m$ high have been fabricated.

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A STUDY ON THE EXPLOSION SAFETY ASSESSMENT OF HYDROCARBON REFRIGERANT REFRIGERATOR

  • Oh, Kyu-Hyung;Kim, Min-Kyu;Chu, Euy-Sung;Lim, Byung-Han;Kim, Man-Hoe;Park, Yoon-Ser
    • Proceedings of the Korea Institute of Fire Science and Engineering Conference
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    • 1997.11a
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    • pp.289-296
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    • 1997
  • This paper discribes an experimental explosion risk assessment study on refrigerators containing flammable hydrocarbon refrigerant. A refrigerator used in this study is a larder fridge type, 215 liter in volume. The hydrocarbon refrigerant used in the refrigerator is iso-butane(C$_4$H$_{10}$). For the explosion safety assessment of the refrigerator, temperature of compressor, cooling air circulation fan motor, defrost heater and inner lamp were measured during the operation. And to confirm the ignitablity of flammable gas by the electric spark of the switches of the refrigerator, ON-OFF test of all switches were conducted with compulsorily near the stoichiometric concentration atmosphere of iso-butane-air mixture. As the result of experiment above mentioned and another experiment for the explosion safety assessment, we can conclude that explosion hazard in connection with the use of hydrocarbon refrigerant was few.w.

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A study of properties for phosphorous content of ENIG against Sn-3Ag-0.5Cu solders (Sn-3Ag-0.5Cu solder에 대한 무전해 Ni-P층의 P함량에 따른 특성 연구)

  • Shin, An-Seob;Ok, Dae-Yool;Jeong, Gi-Ho;Park, Chang-Sik;Kim, Min-Ju;Heo, Cheol-Ho;Kong, Jin-Ho
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.24-24
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    • 2009
  • ENIG(Electroless Nickel Immersion Gold) is the surface treatment method that is used most widely at fine pitch's SMT and BGA packaging process. In this paper, we have studied the effect of P content variation during ENIG process on those phenomena related to the solder joint. The effect of P content was discussed using the results obtained from FE-SEM, EPMA, EDS and FIB. Finally, it was concluded that the more P-content in Ni layer, the thicker P-rich layer.

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Defect Characterization & Control for the Metal Contact with CVD Barrier Metal in Memory Device (반도체 제품의 CVD Barrier Metal기인 Contact불량 연구)

  • Park, Sang-Jun;Yoon, Joo-Byoung;Lee, Kyung-Woo;Lee, Sang-Ick;Kim, Jin-Sung;Chae, Seung-Ki;Chae, Hee-Sun;Roh, Yong-Han
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.11a
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    • pp.179-180
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    • 2007
  • 반도체의 최소 회로 선폭이 감소함에 따라 Contact 저항이 크게 증가하게 된다. Contact 저항을 낮추기 위하여 Tungsten Metal Contact을 일반적으로 사용하며, Si 기판과의 Ohmic 접촉 및 WF6의 Fluorine과 Si 반응을 억제하기 위한 Barrier Metal로 Ti/TiN 이중막을 사용한다. 본 논문에서는 90nm급 이하 제품의 CVD Ti/TiN Barrier Metal이 유발하는 불량 현상과 원인 규명에 대하여 연구하였으며, Ohmic Contact형성을 위해 TiSix형성 최적화 방안에 대해 정리하였다.

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