• Journal of the Korea Society of Computer and Information
• /
• v.9 no.3
• /
• pp.1-6
• /
• 2004

there needs a new Geographic information system development Technology of the abstraction, encapsulation, modulation and hierarchy using Graphic representation of object modeling Technique. The method is based on composite object of Graphic data with the hierarchy concepts and abstraction of Graphic information in order to improve data abstraction of the graphic data file and described concept of multiple inheritance and classification that supports a wide variety of graphic class such as mesh unit, layer. segment and so on. in simple case of software development using SPICE model and object modeling techniques. this thesis suggested object representation of Graphic data which can reduce software development life cycle and the cost of software maintenance.

• The Journal of Society for e-Business Studies
• /
• v.18 no.4
• /
• pp.83-105
• /
• 2013

There are two ways to assess data quality : measurement of data itself and assessment of data quality management process. Recently maturity assessment of data quality management process is used to ensure and certify the data quality level of an organization. Following this trend, the paper presents the process reference model which is needed to assess data quality management process maturity. First, the overview of assessment model for data quality management process maturity is presented. Second, the process reference model that can be used to assess process maturity is proposed. The structure of process reference model and its detail processes are developed based on the process derivation approach, basic principles of data quality management and the basic concept of process reference model in SPICE. Furthermore, characteristics of the proposed model are described compared with ISO 8000-150 processes.

• The KIPS Transactions:PartD
• /
• v.9D no.5
• /
• pp.887-896
• /
• 2002

Based on SPICE (Software Process Improvement and Capability dEtermination) evaluation model, SPIRE (Software Process Improvement in Regions of Europe) is developed and published as a process improvement model for small and medium size organizations. However, practical selection guidelines or mapping rules between business goals and software processes do not exist within SPIRE. This research aims to construct an objective reference mapping table between business goals and software processes, and to propose a process selection method using the mapping table. The mapping table is constructed by the convergence of domestic software process experts' opinions using Delphi techniques. In the suggested process selection method, target processes are selected using the intuition of project participants or project managers as well as the reference mapping table. The feasibility of the proposed selection method has been reviewed by applying to two small software companies. Using the reference mapping table, we could select key processes which were passed over by project managers.

• Proceedings of the KIEE Conference
• /
• 1987.07b
• /
• pp.1560-1563
• /
• 1987

This paper is concerned with time delay modeling of ED MOS gates which takes into account the slope of input waveform as well as the load condition. Defining the delay time as the time required to charge/discharge the load to the physical reference level, the rise/fall delay times arc derived in an explicit formula in terms of the sum of optimally weighted current unbalances at two end points of voltage transition. The proposed model is computationally effective and the error is typically within 10% of the SPICE results.

• Journal of the Institute of Electronics and Information Engineers
• /
• v.52 no.10
• /
• pp.33-46
• /
• 2015

In this paper, we predicts the analog and digital circuit performance of FinFETs that are scaled down following the ITRS(International technology roadmap for semiconductors). For accurate prediction of the circuit performance of scaled down devices, accurate parasitic resistance and capacitance analytical models are developed and their accuracies are within 2 % compared to 3D TCAD simulation results. The parasitic capacitance models are developed using conformal mapping, and the parasitic resistance models are enhanced to include the fin extension length($L_{ext}$) with respect to the default parasitic resistance model of BSIM-CMG. A new algorithm is developed to fit the DC characteristics of BSIM-CMG to the reference DC data. The proposed capacitance and resistance models are implemented inside BSIM-CMG to replace the default parasitic model, and SPICE simulations are performed to predict circuit performances such as $f_T$, $f_{MAX}$, ring oscillators and common source amplifier. Using the proposed parasitic capacitance and resistance model, the device and circuit performances are quantitatively predicted down to 5 nm FinFET transistors. As the FinFET technology scales, due to the improvement in both DC characteristics and the parasitic elements, the circuit performance will improve.

• Journal of KIISE:Software and Applications
• /
• v.33 no.3
• /
• pp.267-276
• /
• 2006

IS 15504 and CMMI, etc are already proven models as a framework to improve the maturity of enterprise software development. However, these process maturity models can't present the detail and practical methods with which people can enhance the development competence and efficiency of an enterprise. Each company or organization should develop its own model or tailor the above models to make them suitable to its unique environment such as product or technology domain, scale of business or organization and cultural environment, etc for the practical application. This study introduces experiences that organizational and technical capability was reinforced based on our own process capability improvement model to improve software development strength in Samsung Electronics. We modeled our own improvement model which is expanded from IS 15504 against our experience. Our SPI model expanded its capability to organizational and technical issues including newly introduced capability level for evaluating its implementation. We expect that our study would give contribution for presenting industry experience and reference model for reinforcing software development competence.