• Title/Summary/Keyword: SPICE Parameters

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Large-Signal Output Equivalent Circuit Modeling for RF MOSFET IC Simulation

  • Hong, Seoyoung;Lee, Seonghearn
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.5
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    • pp.485-489
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    • 2015
  • An accurate large-signal BSIM4 macro model including new empirical bias-dependent equations of the drain-source capacitance and channel resistance constructed from bias-dependent data extracted from S-parameters of RF MOSFETs is developed to reduce $S_{22}$-parameter error of a conventional BSIM4 model. Its accuracy is validated by finding the much better agreement up to 40 GHz between the measured and modeled $S_{22}$-parameter than the conventional one in the wide bias range.

Modeling of InP/InGaAs HPT with ITO Transparent Emitter Contact (ITO 투명전극을 갖는 InP/InGaAs HPTs 모델링)

  • Jang, Eun-Sook;Choi, Byong-Gun;Shin, Ju-Sun;Sung, Kyang-Su;Han, Kyo-Yong
    • Proceedings of the IEEK Conference
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    • 2000.11b
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    • pp.9-12
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    • 2000
  • InP/lnGaAs heterojunciton phototransistors (HPTs) with transparent emitter contacts were fabricated and characterized. Indium Tin Oxide was RF sputtered for the emitter contacts. By comparison with InP/InGaAs HBTs, the dc characteristics of InP/lnGaAs HPTs demonstrated offset voltage due to ITO emitter contacts and similar common emitter current gain. The model parameters were extracted and a simple SPICE simulations were performed.

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Low-voltage current-mode filters using complementary current mirrors (상보형 전류미러를 이용한 저전압 전류모드 필터의 설계)

  • 안정철;최석우;윤창훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.34C no.11
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    • pp.56-65
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    • 1997
  • In this paper, a design of current-mode continuous-time filters for low voltage and high frequency applictions using complementary bipolar current mirror paris is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integrtion. Since the design method of the proposed curent-mode filters is based on the integrator type of realization, it can be used for a wide range of applications. And the cutoff frequency of th efilters can be easily changed by the DC cntrolling current. As design examples, the 5th order butterworth filters are designed by cascade and leapfrog methods with tunable cutoff frequencies from 30MHz to 100MHz. The characteristics of the designed current mode filters are simulated and examined by SPICE using standard bipolar transistor parameters.

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Design of a BJT low-voltge low-frequency filter using current amplifier (전류증폭기를 이용한 BJT 저전압 저주파 필터 설계)

  • 안정철;최석우;윤창훈
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.35C no.5
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    • pp.33-40
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    • 1998
  • In this paper, a design of current-mode continuous-time filters for low voltage and low frequency applications using complementary bipolar current mirrors is presented. The proposed current-mode filters consist of simple bipolar current mirrors and capacitors and are quite suitable for monolithic integration. Since the design method of the proposed current-mode filters are based on the integrator type of realization, it can be used for a wide range of applications. Since the input impedance of simple bipolar current mirror is small, in this paper, negative feedback amplifier is used to realize is designed by cascade method. The cutoff frequency of the designed filter can be easily tunable by the DC controlling current from 60kHz to 120kHz. The characteristics of the designed current-mode filters are simulated and examined by SPICE using standard bipolar transistor parameters.

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Signal Transient and Crosstalk Model of Capacitively and Inductively Coupled VLSI Interconnect Lines

  • Kim, Tae-Hoon;Kim, Dong-Chul;Eo, Yung-Seon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.7 no.4
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    • pp.260-266
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    • 2007
  • Analytical compact form models for the signal transients and crosstalk noise of inductive-effect-prominent multi-coupled RLC lines are developed. Capacitive and inductive coupling effects are investigated and formulated in terms of the equivalent transmission line model and transmission line parameters for fundamental modes. The signal transients and crosstalk noise expressions of two coupled lines are derived by using a waveform approximation technique. It is shown that the models have excellent agreement with SPICE simulation.

Design of a high-speed 32-bit adder using a new dynamic CMOS logic (새로운 동적 CMOS 논리 설계방식을 이용한 고성능 32비트 가산기 설계)

  • 김강철;한석붕
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.3
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    • pp.187-195
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    • 1996
  • This paper proposes two new dynamic CMOS logic styles, called ZMODL (zipper-MODL) and EZMODL (enhanced-ZMODL), which can reduce more area dnd propagation delya than conventional MODL (multiple output domino logic). The 32-bit CLAs(carry look-ahead adder) are designed by ZMODL, EZMODL circuits, and their operations are verified by SPICE 3 with 2$\mu$ double metal CMOS parameters. The results shwo that the CLA designed by EZMODL circuit has achived 32-bit additin time of less than 4.8NS with VDD=5.0V and 8% of transistors cn be redcued, compared to the CLA designed by MODL. The EZMODL logic style can improve the performance in the high-speed computing circuits depending on the degree of recurrence.

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Study on resonant frequency tracking for contactless power system using multiple primary winding contactless transformer (다중일차권선 비접촉변압기를 이용한 비접촉 전원시스템의 공진주파수 추적에 관한 연구)

  • Kim, Yoon-Ho;Rho, Sung-Chan
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.55 no.3
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    • pp.182-188
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    • 2006
  • Contactless power system is base on power transmission by magnetic force. The transformer loss is large because it separated with the gap. Also the system has unstable factor, since the parameters in the secondary can vary with the system movement. This paper proposes light train power transmission system using contactless transformer with multiple primary winding. To increase the system efficiency and to obtain the stable power transmission to the dynamic load, a resonant inverter is adopted. The proposed system was verified by the simulation using Spice and Maxwell. The designed contactless power transmission system is implemented for 5[kW] class and experimental results are discussed.

Design of 5th-Order Elliptic Filter in $2{\mu}m$ CMOS ($2{\mu}m$CMOS 5차 Elliptic OTA-C 필터 설계)

  • Shin, Gun-Soon
    • The Transactions of the Korean Institute of Electrical Engineers
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    • v.43 no.4
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    • pp.672-678
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    • 1994
  • A design of 5th-order Elliptic OTA-C filter for operation at 4.2MHz is presented. the filter structure is composed entirely of five OTAs(Operational transoonductance Amplifiers), one buffer and seven capacitors. To prevent decreasing of frequency charaoteristios due to the parasitic effeots of OTA and buffer, the design considering of parasitic capacitance and finite resistane of OTA and fuffer is pertormed. As the result of the simulation using SPICE with $2{\mu}m$ CMOS parameters, The performances were found to be essentially within the specifications` less than 0.25dB passband attenuation, 30dB stopband attenuation and 4.2MHz cut-off frequency were satisfactorily obtained. The number of elements is also considerably reduced than other design methods.

The Electrical Properties of Self-Aligned High Speed Bipolar Transistor (자기정렬된 고속 바이폴라 트랜지스터의 전기적 특성)

  • 구용서;최상훈;구진근;이진효
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.5
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    • pp.786-793
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    • 1987
  • This paper describes the design and fabrication of the polysilicon selfaligned bipolar transistor with 1.6\ulcorner epitaxy and SWAMI isolation technologies. This transistor has two levels of polysilicon. Also emitter and adjacent edge of polysilicon base contact of this PSA device are defined by the same mask, and emitter feature size is 2x4 \ulcorner. DC characteristic of the fabricated transistor was evaluated and analyzed for the SPICE input parameters. The minimum propagation delay time per gate of 330 ps at 1mW was obtained with 41 stage CML ring oscillator.

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Characteristics an Circuit Model of a Field Emission Triode

  • Nam, Jung-Hyun;Ihm, Jeong-Don;Kim, Jong-Duk;Kim, Yeo-Hwan;Park, Kyu-Man
    • Journal of Electrical Engineering and information Science
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    • v.2 no.5
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    • pp.129-133
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    • 1997
  • A circuit model for a field emission triode has been proposed. The model parameters have been extracted from he fabricated silicon tip array and verified by comparing with the results simulated by circuit simulator(SPICE). The cut-off frequency can be calculated from the parametric capacitance and the transconductance values extracted from measurements. For the field emission triode, the capacitance of 3.45fF/tip and the transconductance of 0.94nS/tip have been measured under the emission current of 4.1nA/tip. From these values, the cut-off frequency is predicted to be 43 kHz but th measured one came out to be 6 kHz. because o the parasitic capacitance components.

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