• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.2
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• pp.38-45
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• 2000

In this paper, an approach of modeling the optical interconnection system by SPICE simulation is presented. SPICE simulations with equivalent circuit models for optical devices are performed in a stable manner. From the simulated results, eye diagrams for receiver output and BER are obtained. Timing jitter due to laser diode turn-on delay effects can be found under various bias conditions. Using this approach, various system parameters such as bit rate, BER, dissipated transmitter power, and bias conditions can be optimized. It is expected that this approach will find useful applications such as Gigabit Ethernet and ATM.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.7 no.1
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• pp.83-91
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• 1996

The SPICE circuit analysis program has a limited math capability and, in general, cannot be used for RF and microwave simulation because a complex arithmetic is required to compute S-parameters from node voltages. This paper presents two test bench models that can be used to obtain node voltages proportional to incident, reflected, and transmitted signals. From SPICE computed node voltages, S-parameters are computed using the math capability of the PSPICE post processor, PROBE, as an example for a low-pass filter consisting of transmission line sections. The results of this example are compared with another high frequency circuit analysis program, TOUCHSTONE. The difference between the results of these two programs in magnitude was less than 0.003 and in phase was a few tenths of a degree. By using these test benchs to simulate a filter, RF and microwave analysis can be made with the SPICE, which can be a cost-effective and readily available computational tool for educators and practicing engineers.

• Journal of Power Electronics
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• v.15 no.2
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• pp.479-486
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• 2015

The application of soft-switching techniques is increasing in the DC/DC converter area. It is important to design soft-switching parameters to ensure the converter operates properly and efficiently. An optimized design method is presented in this paper. The objective function is the total power loss of a converter, while the variables are soft-switching parameters and the constraints are the electrical requirements for soft-switching. Firstly, a response surface methodology (RSM) model with a high precision is built, and the rough optimized parameters can be obtained with the help of a genetic algorithm (GA) in the solution space determined by the constraints. Secondly, a re-optimization is conducted with a SPICE model and a GA, and accurate optimized parameters can be obtained. Simulation and experiment results show that the proposed method performs well in terms of a wide adaptability, efficiency, and global optimization.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.2
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• pp.98-103
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• 2003

This paper proposes new SPICE Macro-Model of Magnetic Tunnel Junction (MTJ) This Macro-Model has five I/O terminals, reproduces MTJ MR characteristics including hysteresis and behaves correctly to time varying input signals. Furthermore, this Model can be easily modified to various MTJs with different characteristics by simply varying internal parameters.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.4
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• pp.7-12
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• 2010

We have developed a SPICE compatible model of thermoelectric devices, and a parameter extracting technique only by electrical and temperature measurement by using Harman method was proposed. The proposed model and parameter extraction technique do not require experimental data from thermal conductivity measurements. The maximum error between extracted parameters extracted by proposed method and conventional method was about 14%, which is not a severe mismatch for real application. The proposed model is applicable to design of both for thermoelectric coolers and thermo electric generators.

• Journal of Electrical Engineering and Technology
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• v.6 no.2
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• pp.270-274
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• 2011

This paper presents a parameterized simulation program with integrated circuit emphasis (SPICE) model of a two-level microbolometer based on negative-temperature-coefficient thin films, such as vanadium oxide or amorphous silicon. The proposed modeling begins from the electric-thermal analogy and is realized on the SPICE modeling environment. The model consists of parametric components whose parameters are material properties and physical dimensions, and can be used for the fast design study, as well as for the co-design with the readout integrated circuit. The developed model was verified by comparing the obtained results with those from finite element method simulations for three design cases. The thermal conductance and the thermal capacity, key performance parameters of a microbolometer, showed the average difference of only 4.77% and 8.65%, respectively.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.14 no.2
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• pp.43-45
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• 2000

In this study, present a method for extracting the BJT 1/f noise model parameters fabricated by BICMOS process. From the geometric analysis of the Kf, we show that Kf is in inverse proportion to emitter area. And it is extracting that $K=0.8\times10_{-20}, A_f=2, \alpha=1$ values.

• Journal of the Korean Vacuum Society
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• v.10 no.1
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• pp.72-80
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• 2001

In this paper, we present a systematic method of extracting the input parameters of poly-Si TFT(Thin-Film Transistor) for Spice simulations. This method has been applied to two different types of poly-Si TFTs such as ELA (Excimer Laser Annealing) and SMC (Silicide Mediated Crystallization) with good fitting results to experimental data. Among the Spice circuit simulators, the PSpice has the GUI(graphic user interface) feature making the composition of complicated circuits easier. We added successfully the poly-Si TFT model of AIM-Spice to the PSpice simulator, and analyzed easily to compare the electrical characteristics of pixels without or with the line RC delay. In the comparative results, the ELA poly-Si TFT is superior to the SMC poly-Si TFT in the charging time and the kickback voltage for the TFT-LCD (Thin Film Transistor-Liquid Crystal Display).

• The Transactions of The Korean Institute of Electrical Engineers
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• v.60 no.12
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• pp.2281-2285
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• 2011

An algorithm for extracting SPICE MOS level 2 model parameters for the high voltage MOSFET DC model is proposed. The optimization method for analyzing the nonlinear data of the current-voltage curve using the Gauss-Newton algorithm is proposed and the pre-process step for calculating the threshold voltage and the mobility is proposed. The drain current obtained from the proposed method shows the maximum relative error of 5.6% compared with the drain current of 2-dimensional device simulation for the high voltage MOSFET.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.2
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• pp.92-97
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• 2013

In this paper the author proposes a method of implementing a numerical model for threshold voltage ($V_{th}$) shift in organic thin-film transistors (OTFTs) into SPICE tools. $V_{th}$ shift is first numerically modeled by dividing the shift into sequentially ordered groups. The model is then used to derive a simulations model which takes into simulation parameters and calculation complexity. Finally, the numerical and simulation models are implemented in AIM-SPICE. The SPICE simulation results agree well with the $V_{th}$ shift obtained from an OTFT fabricated without any optimization. The proposed method is also used to implement the stretched-exponential time dependent $V_{th}$ shift in AIM-SPICE and the results show the proposed method is applicable to various types of $V_{th}$ shifts.