• Journal of the Optical Society of Korea
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• 제18권2호
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• pp.101-109
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• 2014

In this paper, four apodization functions are proposed for silicon-on-insulator (SOI) strip waveguides with sidewall-corrugated gratings. The effects of apodization functions on the full width at half maximum (FWHM), the side-lobe level, and the reflectivity of the reflection spectrum are studied using the coupled-mode theory (CMT) and the transfer-matrix method (TMM). The results show that applying proposed apodization functions creates very good filtering characteristics. Among investigated apodized waveguides, the apodization functions of Polynomial and z-power have the best performance in reducing side-lobes, where the side-lobe oscillations are entirely removed. Four functions are also used for precise adjustment of the bandwidth. Simulation results show that the minimum and maximum values of the FWHM are 0.74 nm and 8.48 nm respectively. In some investigated functions, changing the apodization parameters decreases the reflectivity which is compensated by increasing the grating length.

• 센서학회지
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• 제31권5호
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• pp.353-359
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• 2022

This study investigated via computational analysis the application utility of series-cascaded ring resonators based on silicon-on-insulator (SOI) slot optical waveguides in integrated optical biochemical sensors. The radii of the two rings in the series-cascaded ring resonators were 59.4 ㎛ and 77.6 ㎛ respectively, and the coupling distance was 0.5 ㎛. The series-cascaded ring resonators were computationally analyzed using FIMMProp and PICWave numerical software. The free spectral range (FSR), full width at half maximum (FWHM), sensitivity, and quality-factor (Q-factor) of the series-cascaded ring resonators were 12.2 nm, 0.134 nm, 4100 nm/RIU, and 11580, respectively, and the measurement range was calculated to be slightly smaller than 3×10^-3 RIU. Although the measurement range was smaller than that of the single ring resonator, upon considering other characteristic parameters, the series-cascaded ring resonators are found to be more effective as integrated sensors than single ring resonators.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1451-1453
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• 2001

An SOI(Silicon-On-Insulator) LD(Lateral Double-diffused)MOS with graded gate and recessed source is proposed. The proposed structure can increase the breakdown voltage by reducing the electric field crowding at the edge of gate. Simulation results by TSUPREM4 and MEDICI have shown that the breakdown voltage of proposed device was found to be 52 V while that of conventional device was 45 V. At the same breakdown voltage of 45 V, the on-resistance of the LDMOS with graded gate and recessed source was 14.4 % lower than that of conventional structure.

• 센서학회지
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• 제30권3호
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• pp.131-138
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• 2021

The optimization of the specifications of vertical silicon on insulator (SOI) slot optical waveguides suitable for integrated-optical biochemical sensors was performed through computational analysis of the confinement factor of the guided mode distributed in the slot in addition to analytical examination of the TE mode. The optimized specifications were confirmed based on sensitivity in terms of the change in the refractive index of the biochemical analyte. When the slot width, rail width, and height were set to 120 nm, 200 nm, and 320 nm, respectively, the confinement factor was evaluated to be about 56% and the sensitivity was at least 0.9 [RIU/nm].

• 센서학회지
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• 제31권2호
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• pp.107-114
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• 2022

The effects of ring radius and coupling spacing on the free spectral range (FSR), full width at half maximum (FWHM), quality factor, and sensitivity of single-channel and add-drop channel slot ring resonators were systematically investigated using FIMMPROP and PICWAVE numerical software. The single-channel ring resonator exhibited better characteristics, namely, a wider FSR and narrower FWHM compared with the add-drop structure; thus, it was evaluated to be more suitable for biochemical sensors. The FSR, FWHM, quality factor, and sensitivity for a single channel ring resonator with a radius of 59.4 ㎛ and coupling gap of 0.5 ㎛ were 2.4 nm, 0.087 nm, 17677, and 550 [nm/RIU], respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.17-18
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• 2006

고상 확산 방법을 이용하여 얕은 소스/드레인 접합을 가지는 SOI (Silicon-On-Insulator) MOSFET 소자를 제작하였다. 확산원으로는 PSG(Phosphorus silicate glass) 박막과 PBF(Poly Boron Film) 박막이 각각 n, p-type 소자 형성을 위해 사용되었다. 얕은 접합 형성을 위하여 급속 열처리 방법(RTA: Rapid Thermal Annealing)을 이용하여 PSG와 PBF로부터 인과 붕소를 SOI MOSFET 소자의 소스/드레인으로 확산시켰다. 또한, 소자 특성 개선을 위한 후 속 열처리 공정으로 희석된 수소 분위기 중에서 FA(Furnace Annealing)를 실시하였다. SPD 기술을 적용하여 10 nm 이하의 매우 얕은 p-n 접합을 형성할 수 있었고, 양호한 다이오드 특성을 얻을 수 있었다. 또한, SPD 방법으로 결함이 없는 접합 형성이 가능하며, 소자 제작 공정의 최적화를 통해 차세대 CMOS 소자로 기대되는 SOI MOSFET를 성공적으로 제작할 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 C
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• pp.1585-1587
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• 2004

이중 에피층 구조를 가지는 SOI(Silicon-On-Insulator) LIGBT(Lateral Insulated Gate Bipolar Transistor)의 에피층 두께 변화에 따른 항복전압 특성을 분석하였다. 제안된 소자는 전하보상효과를 얻기 위해 n/p-epi의 이중 에피층 구조를 사용하였으며, 에피층 전체에 걸쳐서 전류가 흐를 수 있도록 하기 위해 trenched anode구조를 채택하였다. 본 논문에서는 n/p-epi층의 농도를 고정시킨 후 각각의 epi층의 두께를 변화시켜가며 simulation을 수행하였을 때 항복전압의 변화 및 표면과 epi층에서의 전계분포변화를 분석하였다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제5권3호
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• pp.187-194
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• 2005

An analysis of the 1/f or flicker noise in FD n-channel Double Gate SOI MOSFET is proposed. In this paper, the variation of power spectral density (PSD) of the equivalent noise voltage and noise current with respect to frequency, channel length and gate-to-source voltage at various temperatures and exponent $C(i.e\;1/f^c$ is reported. The temperature is varied 125 K from to room temperature. The variation of PSD with respect to channel length down to $0.1{\mu}m$ technology is considered. It is analyzed that l/f noise in FD n-channel Double Gate SOI MOSFET is due to both carrierdensity fluctuations and mobility-fluctuations. But controversy still exits to its origin.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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• pp.692-696
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• 2005

In an attempt to fabricate all inclusive display systems we are presenting a study on several elements that would be used as building blocks for all-on-board integrated applications on stainless steel foils. These systems would include in the same substrate all or many of the components needed to drive a flat panel OLED display. We are reporting results on both digital and analog circuits on stainless steel foils. Shift registers running at speeds greater than 1.0MHz are shown as well as oscillators operating at over 40MHz. Pixel circuits for driving organic light emitting diodes are presented. The device technology of choice is that based on poly-silicon TFT technology as it has the potential of producing circuits with good performance and considerable cost savings over the established processes on quartz or glass substrates (amorphous Silicon a-Si:H or silicon on Insulator SOI).

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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• pp.81-82
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• 2006

SOI(Silicon-On-Insulator) MOSFET의 전기적 특성에 미치는 게이트 산화막과 계면준위 밀도의 관계를 조사하였다. 결함이 발생하지 않는 얕은 소스/드레인 접합을 형성하기 위하여 급속열처리를 이용한 고상확산방법으로 제작한 SOI MOSFET 소자는 급속열처리 과정에서 계면준위가 증가하여 소자의 특성이 열화된다. 이를 개선하기 위하여 $H_2/N_2$ 분위기에서 후속 열처리 공정을 함으로써 소자의 특성이 향상됨을 볼 수 있었다. 이와같이 급속열처리 공정과 $H_2/H_2$ 분위기에서의 후속 열처리 공정이 소자 특성에 미치는 영향을 분석하기 위하여 소자 시뮬레이션을 이용하여 게이트 산화막과 채널 사이의 계면준위 밀도를 분석하였다. 그 결과, n-MOSFET의 경우에는 acceptor-type trap, p-MOSFET의 경우에는 donor-type trap density가 소자특성에 큰 영향을 미치는 것을 확인하였다.