• 기술혁신연구
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• 제9권1호
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• pp.37-75
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• 2001

Technological systems are defined as network(s) consisting of technological infrastructure, industrial organization, and institutional infrastructure. This paper reviews SEMATECH in the U.S. and VLSI Program in Korea as a technological system for semiconductor, which is an advanced technology. Several issues are addressed : how did they get started\ulcorner ; how have they been evolved\ulcorner ; how have the actors and institutions within the system interacted\ulcorner ; what role has the government played in that process\ulcorner Both systems were created by their government, respectively, and they have been evaluated as successful. However, while SEMATECH became complete eough in terms of technological infrastructure, industrial organization, and institutional infrastructure to generate sufficient increasing returns to develop in a self-reinforcing way, a series of VLSI program in Korea is still operated discontinuously under the government subsidy. SEMATECH is more flexible and stable than Korea's VLSI program in that the system has a centralized structure and has been managed and staffed by industry substantially. In addition, both cases show that a technological system may evolve having connections with foreign technological systems and local sub-systems beyond nations, regions and industries. Many other similarities, contrasts, and insights for technological policy from each country's experiences are presented.

• 과학기술정책
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• 제2권34호통권34호
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• pp.24-28
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• 1992

• 공기청정기술
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• 제3권2호통권10호
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• pp.59-72
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• 1990

• 마이크로전자및패키징학회지
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• 제15권4호
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• pp.25-29
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• 2008

Reliability and performance in metal gate/high-k device with multiple gate dielectrics were investigated. MOSFETs with a thin $HfSiO_x$ layer on a thermal Si02 dielectric as gate dielectrics exhibit excellent mobility and low interface trap density. However, the distribution of threshold voltages of $HfSiO_x/SiO_2$ stack devices were wider than those of $SiO_2$ and $HfSiO_x$ single layer devices due to the penetration of Hf and/or intermixing of $HfSiO_x$ with underlying $SiO_2$. The results of TZDB and SILC characteristics suggested that a certain portion of $HfSiO_x$ layer reacted with the underlying thick $SiO_2$ layer, which in turn affected the reliability characteristics.

• 전자진흥
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• 제10권8호
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• pp.103-110
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• 1990

• JSTS:Journal of Semiconductor Technology and Science
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• 제10권2호
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• pp.79-99
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• 2010

Pulsed current-voltage (I-V) methods are introduced to evaluate the impact of fast transient charge trapping on the performance of high-k dielectric transistors. Several pulsed I-V measurement configurations and measurement requirements are critically reviewed. Properly configured pulsed I-V measurements are shown to be capable of extracting such device characteristics as trap-free mobility, trap-induced threshold voltage shift (${\Delta}V_t$), as well as effective fast transient trap density. The results demonstrate that the pulsed I-V measurements are an essential technique for evaluating high-$\kappa$ gate dielectric devices.

• JSTS:Journal of Semiconductor Technology and Science
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• 제9권3호
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• pp.166-173
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• 2009

The reliability of hafnium oxide gate dielectrics incorporating lanthanum (La) is investigated. nMOSFETs with metal/La-doped high-k dielectric stack show lower $V_{th}$ and $I_{gate}$, which is attributed to the dipole formation at the high-k/$SiO_2$ interface. The reliability results well correlate with the dipole model. Due to lower trapping efficiency, the La-doping of the high-k gate stacks can provide better PBTI immunity, as well as lower charge trapping compared to the control HfSiO stacks. While the devices with La show better immunity to positive bias temperature instability (PBTI) under normal operating conditions, the threshold voltage shift (${\Delta}V_{th}$) at high field PBTI is significant. The results of a transconductance shift (${\Delta}G_m$) that traps are easily generated during high field stress because the La weakens atomic bonding in the interface layer.