• Title/Summary/Keyword: Reverse current

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Current-voltage Characteristics of Proton Irradiated NPT Type Pourer Diode (양성자가 주입된 NPT형 전력용 다이오드의 전류-전압 특성)

  • Kim Byoung-Gil;Baek Jong-Mu;Lee Jae-Sung;Bae Young-Ho
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.19 no.1
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    • pp.7-12
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    • 2006
  • Local minority carrier lifetime control by means of particle irradiation is an useful technology for Production of modern silicon Power devices. Crystal damage due to ion irradiation can be easily localized by choosing appropriate irradiation energy and minority tarrier lifetime can be reduced locally only in the damaged layer. In this work, proton irradiation technology was used for improving the switching characteristics of a un diode. The irradiation was carried out with various energy and dose condition. The device was characterized by current-voltage, capacitance-voltage, and reverse recovery time measurements. Forward voltage drop was increased to 1.1 V at forward current of 5 A, which was $120\%$ of its original device. Reverse leakage current was 64 nA at reverse voltage of 100 V, and reverse breakdown voltage was 670 V which was the same voltage as original device without irradiation. The reverse recovery time of device was reduced to about $20\%$ compared to that of original device without irradiation.

A study of EPD for Shallow Trench Isolation CMP by HSS Application (HSS을 적용한 STI CMP 공정에서 EPD 특성)

  • Kim, Sang-Yong;Kim, Yong-Sik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.35-38
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    • 2000
  • In this study, the rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.l8um semiconductor device. Through reverse moat pattern process, reduced moat density at high moat density, STI CMP process with low selectivity could be to fit polish uniformity between low moat density and high moat density. Because this reason, in-situ motor current end point detection method is not fit to the current EPD technology with the reverse moat pattern. But we use HSS without reverse moat pattern on STI CMP and take end point current sensing signal.[1] To analyze sensing signal and test extracted signal, we can to adjust wafer difference within $110{\AA}$.

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Signal Analysis of Motor Current for End Point Detection in the Chemical Mechanical Polishing of Shallow Trench Isolation with Reverse Moat Structure

  • Park, Chang-Jun;Kim, Sang-Yong;Seo, Yong-Jin
    • KIEE International Transactions on Electrophysics and Applications
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    • v.2C no.5
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    • pp.262-267
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    • 2002
  • In this paper, we first studied the factors affecting the motor current (MC) signal, which was strongly affected by the systematic hardware noises depending on polishing such as pad conditioning and arm oscillation of platen and recipe, head motor. Next, we studied the end point detection (EPD) for the chemical mechanical polishing (CMP) process of shallow trench isolation (STI) with reverse moat structure. The MC signal showed a high amplitude peak in the fore part caused by the reverse meal. pattern. We also found that the EP could not be detected properly and reproducibly due to the pad conditioning effect, especially when conventional low selectivity slurry was used. Even when there was no pad conditioning effect, the EPD method could not be applied, since the measured end points were always the same due to the characteristics of the reverse moat structure with an open nitride layer.

Characteristics of Plated Bump on Multi-layer Build up PCB by Pulse-reverse Electroplating (Pulse-reverse도금을 이용한 다층 PCB 빌드업 기판용 범프 생성특성)

  • Seo, Min-Hye;Kong, Man-Sik;Hong, Hyun-Seon;Sun, Jee-Wan;Kong, Ki-Oh;Kang, Kae-Myung
    • Korean Journal of Materials Research
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    • v.19 no.3
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    • pp.151-155
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    • 2009
  • Micro-scale copper bumps for build-up PCB were electroplated using a pulse-reverse method. The effects of the current density, pulse-reverse ratio and brightener concentration of the electroplating process were investigated and optimized for suitable performance. The electroplated micro-bumps were characterized using various analytical tools, including an optical microscope, a scanning electron microscope and an atomic force microscope. Surface analysis results showed that the electroplating uniformity was viable in a current density range of 1.4-3.0 A/$dm^2$ at a pulse-reverse ratio of 1. To investigate the brightener concentration on the electroplating properties, the current density value was fixed at 3.0 A/$dm^2$ as a dense microstructure was achieved at this current density. The brightener concentration was varied from 0.05 to 0.3 ml/L to study the effect of the concentration. The optimum concentration for micro-bump electroplating was found to be 0.05 ml/L based on the examination of the electroplating properties of the bump shape, roughness and grain size.

A study on EPD of STI CMP Process with Reverse Moat Pattern (Reverse Moat Pattern을 가진 STI CMP 공정에서 EPD 고찰)

  • Lee, Kyung-Tae;Kim, Sang-Yong;Seo, Yong-Jin;Kim, Chang-Il;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2000.04b
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    • pp.14-17
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    • 2000
  • The rise throughput and the stability in fabrication of device can be obtained by applying of CMP process to STI structure in 0.18um semiconductor device. To employ in STI CMP, the reverse moat process has been added thus the process became complex and the defects were seriously increased. Removal rates of each thin films in STi CMP was not equal hence the devices must to be effected, that is, the damage was occured in the device dimension in the case of excessive CMP process and the nitride film was remained on the device dimension in the case of insufficient CMP process than these defects affect the device characteristics. We studied the current sensing method in STI-CMP with the reverse moat pattern.

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The Effect of Direct and Variable Current on Current Efficiency of Copper Anode (조동의 전류효율에 미치는 직류 및 가변전류의 영향)

  • Ahan, Sung-Chen;Lee, Sang-Mun;Kim, Yong-Hwan;Chung, Won-Sub
    • Journal of the Korean institute of surface engineering
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    • v.39 no.5
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    • pp.223-228
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    • 2006
  • The current efficiency of copper anode containing impurities in copper sulfate solution for electrorefining was studied at various current type such as direct current, variable current and periodic reverse current. The passivity behavior was investigated by galvanostatic technique. The results obtained were that current efficiency of variable current was higher than those of direct current and periodic reverse current. The increased current efficiency could be explained by the formation of slime structure with lower average resistance due to variable current. The frequency of various factors in variable current condition has a greatest effect on current efficiency. It appeared that frequency increased current efficiency when increased from 1 to 4, but further increases did not have an effect.

Effects of Storage Condition on Degradation of Automotive Polymer Electrolyte Membrane Fuel Cells (보관상태가 자동차용 고분자전해질 연료전지의 성능 감소에 미치는 영향)

  • Cho, Eun-Ae
    • Journal of the Korean Electrochemical Society
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    • v.13 no.4
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    • pp.277-282
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    • 2010
  • Durability of automotive polymer electrolyte membrane fuel cell (PEMFC) strongly depends the startup/shutdown procedure. Formation of hydrogen/air boundary in the anode gas channel, so-called reverse current condition, particularly induces fast degradation of the cathode. Under the reverse current condition, high voltage is present at the cathode facing air in the anode gas channel and is a function of residual oxygen concentration in the gas channels, that increases with storage time and reaches 21% (air) eventually. In this study, effects of residual oxygen concentration in a PEMFC on degradation of the PEMFC.

Diode and MOSFET Properties of Trench-Gate-Type Super-Barrier Rectifier with P-Body Implantation Condition for Power System Application

  • Won, Jong Il;Park, Kun Sik;Cho, Doo Hyung;Koo, Jin Gun;Kim, Sang Gi;Lee, Jin Ho
    • ETRI Journal
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    • v.38 no.2
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    • pp.244-251
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    • 2016
  • In this paper, we investigate the electrical characteristics of two trench-gate-type super-barrier rectifiers (TSBRs) under different p-body implantation conditions (low and high). Also, design considerations for the TSBRs are discussed in this paper. The TSBRs' electrical properties depend strongly on their respective p-body implantation conditions. In the case of the TSBR with a low p-body implantation condition, it exhibits MOSFET-like properties, such as a low forward voltage ($V_F$) drop, high reverse leakage current, and a low peak reverse recovery current owing to a majority carrier operation. However, in the case of the TSBR with a high p-body implantation condition, it exhibits pn junction diode.like properties, such as a high $V_F$, low reverse leakage current, and high peak reverse recovery current owing to a minority carrier operation. As a result, the TSBR with a low p-body implantation condition is capable of operating as a MOSFET, and the TSBR with a high p-body implantation condition is capable of operating as either a pn junction diode or a MOSFET, but not both at the same time.

Stability evaluation of a proportional valve controller for forward-reverse power shuttle control of agricultural tractors

  • Jeon, Hyeon-Ho;Kim, Taek-Jin;Kim, Wan-Soo;Kim, Yeon-Soo;Choi, Chang-Hyun;Kim, Yong-Hyeon;Kim, Yong-Joo
    • Korean Journal of Agricultural Science
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    • v.48 no.3
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    • pp.597-606
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    • 2021
  • Due to the characteristics of the farmland in Korea, forward and reverse shift is the most used. The fatigue of farmers is caused by forward and reverse shifting with a manual transmission. Therefore, it is necessary to improve the convenience of forward and backward shifting. This study was a basic study on the development of a current control system for forward and reverse shifting of agricultural tractors using proportional control valves and a controller. A test bench was fabricated to evaluate the current control accuracy of the control system, and the stability of the controller was evaluated through CPU (central processing unit) load measurements. A controller was selected to evaluate the stability of the proportional valve controller. The stability evaluation was performed by comparing and analyzing the command current of the controller and the actual current measured. The command current was measured using a CAN (controller area network) communication device and DAQ (data acquisition). The actual current was measured with a current probe and an oscilloscope. The control system and stability evaluation was performed by measuring the CPU load on the controller during control operations. The average load factor was 12.27%, and when 5 tasks were applied, it was shown to be 70.65%. This figure was lower than the CPU limit of 74.34%, when 5 tasks were applied and was judged to be a stable system.

Introduction to Industrial Applications of Low Power Design Methodologies

  • Kim, Hyung-Ock;Lee, Bong-Hyun;Choi, Jung-Yon;Won, Hyo-Sig;Choi, Kyu-Myung;Kim, Hyun-Woo;Lee, Seung-Chul;Hwang, Seung-Ho
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.9 no.4
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    • pp.240-248
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    • 2009
  • Moore's law has driven silicon technology scale down aggressively, and it results in significant increase of leakage current on nano-meter scale CMOS. Especially, in mobile devices, leakage current has been one of designers' main concerns, and thus many studies have introduced low power methodologies. However, there are few studies to minimize implementation cost in the mixed use of the methodologies to the best of our knowledge. In this paper, we introduce industrial applications of low power design methodologies for the decrease of leakage current. We focus on the design cost reduction of power gating and reverse body bias when used together. Also, we present voltage scale as an alternative to reverse body bias. To sustain gate leakage current, we discuss the adoption of high-$\kappa$ metal gate, which cuts gate leakage current by a factor of 10 in 32 nm CMOS technology. A 45 nm mobile SoC is shown as the case study of the mixed use of low power methodologies.