• Journal of the Korea Society for Simulation
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• v.12 no.2
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• pp.45-53
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• 2003

This paper presents a retargetable compiled assembly simulation technique for fast ASIP(application specific instruction processor) simulation. Development of ASIP which satisfies design requirements in various fields of applications such as telecommunication, wireless network, etc. needs formal design methodology and high-performance relevant software environments such as compiler and simulator In this paper, we employ the architecture description language(ADL) named ${HiXR}^2$ to automatically synthesize an instruction-level compiled assembly simulator. A compiled simulation has benefit of time efficiency to interpretive one because it performs instruction fetching and decoding at compile time. Especially, in case of assembly simulation, instruction decoding is usually a time-consuming job(string operation), so the compiled simulation of assembly simulation is more efficient than that of binary simulation. Performance improvement of the compiled assembly simulation based on ${HiXR}^2$ is exemplified with an ARM9 architecture and a CalmRISC32 architecture. As a result, the compiled simulation is about 150 times faster than interpretive one.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.37 no.4
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• pp.1-8
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• 2000

The massive growth of the internet and the world-wide-web leads us to research the programming languages for the development of applications in heterogeneous, network-wide distributed environments. Java is an object-oriented language for such a environment and the Java programming language environment provides a portable, interpreted, high-performance, simple programming language. Bytecode is an intermediate code for Java language and it enables the development of applications on multiple platform in heterogeneous, distributed networks. But it takes much time to execute Bytecode because of using an interpretation method. In this paper, we design and implement a retargetable code generation system which can be systematically reconfigured to generate code for a variety of distinct target computers. From the system, we realize the code generation system which translates the Bytecode being produced by Java compiler into Pentium target code. We use ACK code generation system to do the work easily.

• Journal of Korea Multimedia Society
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• v.14 no.3
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• pp.462-470
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• 2011

Retargetability is typically achieved by providing target machine information, ADL, as input. The ADL are used to specify processor and memory architectures and generate software toolkit including compiler, simulator, etc. Simulator are critical components of the exploration and software design toolkit for the system designer. They can be used to perform diverse tasks such as verifying the functionality and/or timing behavior of the system, and generating quantitative measurements(e.g., power energy consumption) which can be used to aid the design process. In this paper, we generate the energy consumption estimation simulator through ADL. For this goal, firstly, we describes the energy consumption estimation and monitoring informations on the ADL based on EXPRESSION. Secondly, we generate the energy estimation and monitoring simulation library and then constructs the simulator, RenergySim. Lastly, we represent the energy estimations results for MIPS R4000 ADL description. From this subjects, we contribute to the efficient architecture developments and prompt SDK generation through programmable experiments in the field of mobile software development.