• ETRI Journal
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• v.35 no.3
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• pp.439-447
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• 2013

To increase device memory yield, many manufacturers use incorporated redundancy to replace faulty cells. In this redundancy technology, the implementation of an effective redundancy analysis (RA) algorithm is essential. Various RA algorithms have been developed to repair faults in memory. However, nearly all of these RA algorithms have low analysis speeds. The more densely compacted the memory is, the more testing and repair time is needed. Even if the analysis speed is very high, the RA algorithm would be useless if it did not have a normalized repair rate of 100%. In addition, when the number of added spares is increased in the memory, then the memory space that must be searched with the RA algorithms can exceed the memory space within the automatic test equipment. A very efficient RA algorithm using simple calculations is proposed in this work so as to minimize both the repair time and memory consumption. In addition, the proposed algorithm generates an optimal solution using a tree-based algorithm in each fault group. Our experiment results show that the proposed RA algorithm is very efficient in terms of speed and repair.

• Laser Solutions
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• v.15 no.1
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• pp.6-9
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• 2012

In TFT-LCD manufacturing process, various defects are generated by manufacturing machine trouble or particle. These defects can be repaired through the TFT-Laser repair process that only can't be automated in TFT-LCD manufacturing Process. In this Paper, we propose auto defect algorithm for TFT-LCD laser repair machine using image processing algorithm in order to automate process. Proposed algorithm can detect very small defects (< 2um) in 98% success ratio, and generated laser repair path guarantee highly precise position accuracy. Through proposed system, much of the work still done the old-fashioned way, by hand, can be automated and manufacturing company can be strengthed the competitiveness of cost.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.5
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• pp.432-437
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• 2008

This paper proposes a defect cell extraction algorithm for TFT-LCD auto-repair system. Auto defect search algorithm and automatic defect cell extraction method are very important for TFT-LCD auto repair system. In the previous literature[1], we proposed an automatic visual inspection algorithm of TFT-LCD. Based on the inspected information(defect size and defect axis, if defect exists) by the automatic search algorithm, defect cells should be extracted from the input image for the auto repair system. For automatic extraction of defect cells, we used a novel block matching algorithm and a simple filtering process in order to find a given reference point in the LCD cell. The proposed defect cell extraction algorithm can be used in all kinds of TFT-LCD devices by changing a stored template which includes a given reference point. Various experimental results show the effectiveness of the proposed method.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.2
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• pp.50-60
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• 1997

Reconfiguration of a memory array using spare rows and columns has been known to be a useful technique to improve the yield. When the numbers of spare rows and scolumns are limited, respectively, the repair problem is known to be NP-complete. In this paper, we propose the reconfiguration algorithm for an array of memory cells using faulty cel clustering, which removes rows and columns algrithm is the simplest reconfiguration method with the time complexity of $O(n^2)$, where n is the number of faulty cells, however the repair rate is very low. Whereas the exhaustive search algorithm has a high repair rate, but the time complexity is $O(2^n)$. The proposed algorithm provides the same repair rate as the exhaustive search algorithm for almost all cases and runs as fast as the greedy method. It has the time complexity of $O(n^3)$ in the worst case. We show that the propsed algorithm provides more efficient solutions than other algorithms using simulations.

• ETRI Journal
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• v.32 no.4
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• pp.642-644
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• 2010

With the rapid increase occurring in both the capacity and density of memory products, test and repair issues have become highly challenging. Memory repair is an effective and essential methodology for improving memory yield. An SoC utilizes built-in redundancy analysis (BIRA) with built-in self-test for improving memory yield and reliability. This letter proposes a new heuristic algorithm and new hardware architecture for the BIRA scheme. Experimental results indicate that the proposed algorithm shows near-optimal repair efficiency in combination with low area and time overheads.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.15 no.10
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• pp.3642-3667
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• 2021

Texture synthesis technology has the advantages of repairing texture and structure at the same time. However, during the filling process, the size of the patch is fixed, and the content of the filling is not fully considered. In order to be able to adaptively change the patch size, we used the exemplar-based inpainting technique as the test algorithm, considering the image structure and texture, calculated the image structure patch size and texture patch size, and comprehensively determined the image patch size. This can adaptively change the patch size according to the filling content. In addition, we use multi-layer images to calculate the priority, so that the order of image repair was more stable. The proposed repair algorithm is compared with other image repair algorithms. The experimental results showed that the proposed adaptive image repair algorithm can better repair the texture and structure of the image, which proved the effectiveness of the proposed algorithm.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.12
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• pp.5729-5744
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• 2017

Vehicular Ad Hoc Networks (VANET) in the large-scale road section usually have typical characteristics of large number of vehicles and unevenly distribution over geographic spaces. These two inherent characteristics lead to the unsatisfactory performance of VANETs. This poor performance is mainly due to fragile communication link and low dissemination efficiency. We propose a novel routing mechanism to address the issue in the paper, which includes a competition-based routing discovery with priority metrics and a local routing repair strategy. In the routing discovery stage, the algorithm uses adaptive scheme to select a stable route by the priorities of routing metrics, which are the length of each hop, as well as the residual lifetime of each link. Comparisons of different ratios over link length and link stability further show outstanding improvements. In the routing repair process, upstream and downstream nodes also compete for the right to establish repair process and to remain as a member of the active route after repair. Our simulation results confirm the improved performance of the proposed algorithm.

• Industrial Engineering and Management Systems
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• v.7 no.3
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• pp.204-213
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• 2008

Companies that produce capital goods need to schedule the production of products that have complex product structures with components that require many operations on different machines. A feasible schedule must satisfy operation and assembly precedence constraints. It is also important to avoid deadlock situations. In this paper a Genetic Algorithm (GA) has been developed that includes a new repair process that rectifies infeasible schedules that are produced during the evolution process. The algorithm was designed to minimise the combination of earliness and tardiness penalties and took into account finite capacity constraints. Three different sized problems were obtained from a collaborating capital goods company. A design of experimental approach was used to systematically identify that the best genetic operators and GA parameters for each size of problem.

• Journal of Korean Society for Quality Management
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• v.19 no.1
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• pp.129-140
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• 1991

This paper deals with on (S-1, S) spare-part inventory model for multi-stage machine repair problem with attrition. The steady-state availability of the system is maximized under some constraints such as total cost, available space etc.. The problem is formulated as a closed queueing network and the system availability is calculated by Buzen's computational algorithm. In order to find the optimal numbers of spare units and repair channels for each operating stage, the problem is formulated as a non-linear integer programming(NLIP) problem and an efficient algorithm. which is a natural extension of the new Lawler-Bell algorithm of Sasaki et el., is used to solve the NLIP problem. A numerical example is given to illustrate the algorithm.

• Journal of Korean Institute of Industrial Engineers
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• v.15 no.2
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• pp.93-101
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• 1989

The classic machine repair problem is extended to the case where a number of different machines are arranged in the sequence of operation. The steady-state availability of the system with a series of operating machines is maximized under some constraints such as total cost, available space. In order to find the optimal numbers of spare units and repair channels for each operating machine, the problem is formulated as non-linear integer programming(NLIP) problem and an efficient algorithm, which is a natural extension of the new Lawler-Bell algorithm of Sasaki et al., is used to solve the NLIP problem. A numerical example is given to illustrate the algorithm.