• 한국생산제조학회지
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• 제20권4호
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• pp.472-477
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• 2011

This paper shows the method of fabrication of a micro lens array comprised of a Nipkow disk used in a large-area, high-speed confocal microscopy. A Nipkow disk has two components, a micro lens array disk and a pinhole array disk. The microlens array focuses illumination light onto the pinhole array disk and redirects reflected light from a surface to a sensor. The micro lens which are positioned in order on a disk have a hemispheric shape with a few tens of micron in diameter, and can be fabricated by a variety of methods like mechanical machining, semiconductor process, replication process like imprinting process. This paper shows how to fabricate the micro lens array which has a long focal length by reflow and imprinting process.

• 전자공학회논문지A
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• 제33A권7호
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• pp.127-133
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• 1996

In this paper, we propose a new fabrication method for poly-Si TFTs with a self-aligned offset gated structure by employing a photoresist reflow process. Compared with the conventional poly-Si TFTs, the device is consist of two gate electrodes, of which one is the entitled main gate where the gate bias is employed and the other is the entitled subgate which is separate form both sides of the main gate. The poly-Si channel layer below the offset oxide is protected form the injected ion impurities for the source/drain implantation and acts as an offset region of the proposed device. The key feature of oru new device is the offset region due to the offset oxide. our experimental reuslts show that the offset region, due to the photoresist reflow process, has been sucessfully obtained in order to fabricate the offset gated poly-Si TFTs. The maximum ON/OFF ratio occurs at the L$_{off}$ of 1.1${\mu}$m and exceeds 1X10$^{6}$.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2004년도 추계 기술심포지움 초록집
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• pp.15-15
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• 2004

• 한국재료학회:학술대회논문집
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• 한국재료학회 1998년도 IUMRS-ICEM ABSTRACT BOOK
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• pp.140.1-140
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• 1998

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2013년도 춘계학술대회 논문집
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• pp.835-836
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• 2013

• 한국초전도ㆍ저온공학회논문지
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• 제12권2호
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• pp.9-12
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• 2010

A lamination system using reflow soldering was developed to enhance the mechanical properties of high temperature superconductor (HTS) tape. The laminated coated conductor tape was fabricated using the continuous lamination process. The mean, maximum, and minimum tensile loads in a T-peel test of the laminated coated conductor were 9.9 N, 12.5 N, and 7.6 N, respectively. The critical current ($I_c$) distributions of the non-laminated and laminated coated conductor were compared using anon-contact Hall probe method. The transport $I_c$ nearly matched the non-contact $I_c$; however, some degraded Ic regions were found on the length of 800 cm of laminated coated conductor. We confirmed that the cause of the partially degraded $I_c$ was due to an increase in line tension by (1) solidification induced by a change of composition that usually occurs in molten brass (Cu, Zn) in solder, or (2) non-homogeneity of the thickness of the coated conductor or metal tapes. We suggest that reflow soldering is a promising method for reinforced HTS tape if the controlling solder thickness and lamination guide are modified.

• 청정기술
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• 제11권4호
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• pp.205-211
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• 2005

마이크로렌즈 어레이의 제작은 매우 다양한 재료와 방법이 제안되어 지고 있으나, 폴리머를 이용한 사출법은 광학적 특성, 내충격성, 가공성, 경량화 및 환경친화성 등의 장점으로 주목 받고 있다. 사출법 템플레이트를 제작하기 위한 PR(Photo-Resist) reflow법은 형상제어가 용이하고 대량생산과 정밀가공의 측면에서 효율적이어서, 집적화가 용이하고 공정을 줄일 수 있는 장점을 갖게 되어 매우 환경친화적이다. 그러나 마이크로렌즈 어레이의 사출성형은 사용되는 폴리머재료의 성질에 따라 성형에 어려움이 있는 것으로 알려져 있다. 본 연구에서는 이와 같은 성형의 어려움을 극복하기 위한 방법으로 급가열/급냉각 사출을 통하여 마이크로렌즈 어레이를 제작하고 특성을 이해하였다. 템플레이트의 급격한 온도상승과 고온에서의 모양이 냉각으로 인한 변형이 없도록 급속히 냉각시켜 줌으로서 마이크로렌즈 어레이의 사출성형을 구현 하였다. PC(Poly-Cabon ate)와 PMMA(Poly-Methyl-Meth-Acrylate)를 비교하여, PMMA가 낮은 용융점에 의해 성형성이 우수함을 확인하였다. 사출시 압력과 속도를 변수로 마이크로렌즈 어레이의 제작을 위한 사출조건을 도출하였다.

• 한국정밀공학회지
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• 제31권10호
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• pp.865-871
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• 2014

Paradigm shift to 3-D chip stacking in electronic packaging has induced a lot of integration challenges due to the reduction in wafer thickness and pitch size. This study presents a hybrid bonding technology by self-alignment effect in order to improve the flip chip bonding accuracy with ultra-thin wafer. Optimization of Cu pillar bump formation and evaluation of various factors on self-alignment effect was performed. As a result, highly-improved bonding accuracy of thin wafer with a $50{\mu}m$ of thickness was achieved without solder bridging or bump misalignment by applying reflow process after thermo-compression bonding process. Reflow process caused the inherently-misaligned micro-bump to be aligned due to the interface tension between Si die and solder bump. Control of solder bump volume with respect to the chip dimension was the critical factor for self-alignment effect. This study indicated that bump design for 3D packaging could be tuned for the improvement of micro-bonding quality.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2007년도 SMT/PCB 기술세미나
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• pp.37-47
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• 2007

Factor : Structure Metal pad & SMO size Board level TC test : - Large SMO size better Board level Drop test : - Large SMO size better Factor : Structure Substrate thickness Board level TC test : - Thick substrate better Board level Drop test : - Substrate thickness is not a significant factor for drop test Factor : Material Solder alloy Board level TC test : - Not so big differences over Pb-free solder and NiAu, OSP finish Board level Drop test : - Ni/Au+SAC105, CuOSP+LF35 are better Factor : Material Pad finish Board level TC test : - NiAu/NiAu is best Board livel Drop test : - CuOSP is best Factor : Material Underfill Board level TC test - Several underfills (reworkable) are passed TCG x500 cycles Board level Drop test : - Underfill lots have better performance than non-underfill lots Factor : Process Multiple reflow Board level TC test : - Multiple reflow is not a significant actor for TC test Board level Drop test : N/A Factor : Process Peak temp Board level TC test : - Higher peak temperature is worse than STD Board level Drop test : N/A Factor : Process Stack method Board level TC test : - No big difference between pre-stack and SMT stack Board level Drop test : - Flux dipping is better than paste dipping but failure rate is more faster

• Journal of Welding and Joining
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• 제27권1호
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• pp.85-89
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• 2009

Reflow process conditions were investigated for 0402 electric parts with Sn-3.0Ag-0.5Cu solders. Circle hole shape metal mask with 100 m thickness showed excellent printability. Self alignment abilities were 71% for 1005 chips, 52% for 0603 chips, and 3% for 0402 chips. Average joining strengos were 1990 gf for 1005 chips, 867 gf for 0603 chips, and 525 gf for 0402 chips. As mis-mounting angle increased, joining strength decreased. Considering self-alignment ability, mounting angle had to be under $5^{\circ}$ and contact area of the chips had to be over 40% for Pb-free soldering process for 0402 chips.