• Journal of the Microelectronics and Packaging Society
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• v.26 no.3
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• pp.7-13
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• 2019

In this paper, the principles, types and characteristics of the laser and laser soldering are introduced. Laser soldering methods for electronics, metals, semiconductors are also presented. Laser soldering is a non-contact process that transfers energy to solder joint by a precisely controlled beam. Demands for laser soldering are increasing due to bonding for complex circuits and local heating in micro joint. Laser absorption ratio depends on materials, and each material has different absorption or reflectivity of the laser beam, which requires fine adjustment of the laser beam. Laser types and operating conditions are also important factors for laser soldering performance. In this paper, the performance of Nd:YAG laser soldering is compared to the hot blast reflow. Meanwhile, a diode laser gives different wavelength and smaller parts with high performance, but it has various reliability issues such as heat loss, high power, and cooling technology. These issues need to be improved in the future, and further studies for laser micro-joining and soldering are required.

• Journal of the Korean Society of Industry Convergence
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• v.26 no.4_1
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• pp.517-527
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• 2023

Many techniques have been proposed and investigated for microlens array manufacturing in three-dimensional (3D) structures. We present fabricating a microlens array using selective laser etching and a CO₂ laser. The femtosecond laser was employed to produce multiple micro-cracks that comprise the predesigned 3D structure. Subsequently, the wet etching process with a KOH solution was used to produce the primary microlens array structures. To polish the nonoptical surface to the optical surface, we performed reflow postprocessing using a CO₂ laser. We confirmed that the micro lens array can be manufactured in three primary shapes (cone, pyramid and hemisphere). Compared to our previous study, the processing time required for laser processing was reduced from approximately 1 hour to less than 30 seconds using the proposed processing method. Therefore, micro lens arrays can be manufactured using our processing method and can be applied to mass productionon large surface areas.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.5
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• pp.16-22
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• 2002

This paper suggests the optimum processing conditions for obtaining good quality $P^{+}$-n shallow junctions formed by pre-amorphization and furnace annealing(FA) to reflow BPSG(bore phosphosilicate glass). $BF_2$ions, the p-type dopant, were implanted with the energy of 20keV and the dose of 2$\times$10$^{15}$ cm$^{-2}$ into the substrates pre-amorphized by As or Ge ions with 45keV, 3$\times$$10^{14}$ $cm^{-2}$. High temperature annealings were performed with a furnace and a rapid thermal annealer. The temperature range of RTA was 950~$1050^{\circ}C$, and the furnace annealing was employed for BPSG reflow with the temperature of $850^{\circ}C$ for 40 minutes. To characterize the formed junctions, junction depth, sheet resistance and diode leakage current were measured. Considering the preamorphization species, Ge ion exhibited better results than As ion. Samples preamorphized with Ge ion and annealed with $1000^{\circ}C$ RTA showed the most excellent characteristics. When FA was included, Ge preamorphization with $1050^{\circ}C$ RTA plus FA showed the lowest product of sheet resistance and junction depth and exhibited the lowest leakage currents.

• Journal of Welding and Joining
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• v.30 no.5
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• pp.64-69
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• 2012

Sn-Bi eutectic alloy has been widely used as one of the key solder materials for step soldering at low temperature. The Sn-58Bi solder paste containing chloride flux was adopted to compare with that using the chloride-free flux. The paste was applied on the electroless nickel-immersion gold (ENIG) surface finish by stencil printing, and the reflow process was then performed at $170^{\circ}C$ for 10 min. After reflow, the solder joints were aged at $125^{\circ}C$ for 100, 200, 300, 500 and 1000 h in an oven. The interfacial microstructures were obtained by using scanning electron microscopy (SEM), and the composition of intermetallic compounds (IMCs) was analyzed using energy dispersive spectrometer (EDS). Two different IMC layers, consisting of $Ni_3Sn_4$ and relatively very thin Sn-Bi-Ni-Au were formed at the solder/surface finish interface, and their thickness increased with increasing aging time. The wettability of solder joints was investigated by wetting balance test. The mechanical property of each aging solder joint was evaluated by the ball shear test in accordance with JEDEC standard (JESD22-B117A). The results show that the highest shear force was measured when the aging time was 100 h, and the fracture mode changed from ductile fracture to brittle fracture with increasing aging time. On the other hand, the chloride flux in the solder paste did not affect the shear force and fracture mode of the solder joints.

• Korean Journal of Materials Research
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• v.9 no.3
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• pp.288-294
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• 1999

In the flip chip interconnection using solder bump, the Under Bump Metallurgy (UBM) is required to perform multiple functions in its conversion of an aluminum bond pad to a solderable surface. In this study, various UBM systems such as $Al 1\mu\textrm{m} / Ti 0.2\mu\textrm{m} / Cu 5\mu\textrm{m}, Al 1\mu\textrm{m} / Ti 0.2\mu\textrm{m} / Cu 1\mu\textrm{m}, al 1\mu\textrm{m}/Ni 0.2\mu\textrm{m} / Cu 1\mu\textrm{m} and Al 1\mu\textrm{m}/Pd 0.2\mu\textrm{m} / Cu 1\mu\textrm{m}$ for flip chip interconnection using the low melting point eutectic 63Sn-37Pb solder were investigated and compared to their metallurgical properties. $100\mu\textrm{m}$ size bumps were prepared for using an electroplating process. The effects of the number of reflows and aging time on the growth of intermetallic compounds(IMC) were investigated. $Cu_6Sn_5$ and $Cu_3Sn$ IMC were abserved after aging treatment in the UBM system with thick coper $(Al 1\mu\textrm{m}/Ti 0.2\mu\textrm{m}/Cu 5\mu\textrm{m})$. However only the $Cu_6Sn_5$ was detected in the UBM system with $1\mu\textrm{m}$ thick copper even after 2 reflow and 7 day aging at $150^{\circ}C$. Complete Cu consumption by Cu-Sn IMC growth gives rise to a direct contact between solder inner layer such as Ti, Ni and Pd, and hence to possibly cause reactions between two of them. In this study, however, only for the Pd case, IMC of PdSn. was observed by Cu consumption. UBM interfacial reactions with s이der affected the adhesion strength ot s이der balls after s이der reflow and annealing treatment.

• Journal of the Microelectronics and Packaging Society
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• v.19 no.3
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• pp.77-82
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• 2012

In this paper, the research of IC embedded PCB process is carried out. For embedding chips into PCB, solder-balls on chips were etched out and ABF(Ajinomoto Build-ip Film), prepreg and Cu foil was laminated on that to fabricate 6 layer build-up board. The chip of which solder ball was removed was successfully interconnected with PCB by laser drilling and Cu plating. However, de-lamination phenomenon occurred between chip surface and ABF during reflow and thermal shock. To solve this problem, de-smear and plasma treatment was applied to PI(polyimide) passivation layer on chip surface to improve the surface roughness. The properties of chip surface(PI) was investigated in terms of AFM(Atomic Force Micrometer), SEM and XPS (X-ray Photoelectron Spectroscopy). As results, nano-size anchor was evenly formed on PI surface when plasma treatment was combined with de-smear(NaOH+KMnO4) process and it improved thermal shock reliability ($260^{\circ}C$-10sec solder floating).

• Journal of the Korean Vacuum Society
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• v.6 no.4
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• pp.326-336
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• 1997

From the concept that the ion implantation-induced defect is one of the major factors in determining source/drain junction characteristics, high quality ultra-shallow $p^+$-n junctions were formed through the control of ion implantation-induced defects in silicon substrate. In conventional process of the junction formation. $p^+$ source/drain junctions have been formed by $^{49}BF_2^+$ ion implantation followed by the deposition of TEOS(Tetra-Ethyl-Ortho-Silicate) and BPSG(Boro-Phospho-Silicate-Glass) films and subsequent furnace annealing for BPSG reflow. Instead of the conventional process, we proposed a series of new processes for shallow junction formation, which includes the additional low temperature RTA prior to furnace annealing, $^{49}BF_2^+/^{11}B^+$ mixed ion implantation, and the screen oxide removal after ion implantation and subsequent deposition of MTO (Medium Temperature CVD oxide) as an interlayer dielectric. These processes were suggested to enhance the removal of ion implantation-induced defects, resulting in forming high quality shallow junctions.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.1
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• pp.21-28
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• 2004

We have demonstrated the applicability of dry film photoresist (DFR) in photolithography process for fine pitch solder bumping on the polytetrafluoroethylene (PTFE/Teflon ) printed circuit board (PCB). The copper lines were formed with 100$\mu\textrm{m}$ width and 18$\mu\textrm{m}$ thickness on the PTFE test board, and varying the gaps between two copper lines in a range of 100-200$\mu\textrm{m}$. The DFRs of 15$\mu\textrm{m}$ thickness were laminated by hot roll laminator, by varying laminating temperature from $100{\circ}C$ to 15$0^{\circ}C$ and laminating speed from 0.28-0.98cm/s. We have found the optimum process of DFR lamination on PTFE PCB and accomplished the formation of indium solder bumps. The optimum lamination condition was temperature of $150^{\circ}C$ and speed of about 0.63cm/s. And the smallest size of indium solder bump was diameter of 50$\mu\textrm{m}$ with pitch of 100$\mu\textrm{m}$.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.84-87
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• 2003

Since Pb-free solder alloys have been used extensively in microelectronic packaging industry, the interaction between UBM (Under Bump Metallurgy) and solder is a critical issue because IMC (Intermetallic Compound) at the interface is critical for the adhesion of mechanical and the electrical contact for flip chip bonding. IMC growth must be fast during the reflow process to form stable IMC. Too fast IMC growth, however, is undesirable because it causes the dewetting of UBM and the unstable mechanical stability of thick IMC. UP to now. Ni and Cu are the most popular UBMs because electroplating is lower cost process than thin film deposition in vacuum for Al/Ni(V)/Cu or phased Cr-Cu. The consumption rate and the growth rate of IMC on Ni are lower than those of Cu. In contrast, the wetting of solder bumps on Cu is better than Ni. In addition, the residual stress of Cu is lower than that of Ni. Therefore, the alloy of Cu and Ni could be used as optimum UBM with both advantages of Ni and Cu. In this paper, the interfacial reactions of Sn-3.5Ag-0.7Cu solder on Ni-xCu alloy UBMs were investigated. The UBMs of Ni-Cu alloy were made on Si wafer. Thin Cr film and Cu film were used as adhesion layer and electroplating seed layer, respectively. And then, the solderable layer, Ni-Cu alloy, was deposited on the seed layer by electroplating. The UBM consumption rate and intermetallic growth on Ni-Cu alloy were studied as a function of time and Cu contents. And the IMCs between solder and UBM were analyzed with SEM, EDS, and TEM.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.4
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• pp.31-39
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• 2008

To develop the MEMS cap bonding process without cavity formation, we electroplated Cu/Sn rim structures and measured the bonding characteristics for the Cu/Sn rims of $25{\sim}400{\mu}m$ width. As the effective device-mounting area ratio decreased and the failure strength ratio increased for wider Cu/Sn rim, these two properties were estimated to be optimized for the Cu/Sn rim with 150 ${\mu}m$ width. Complete bonding was accomplished at the whole interfaces of the Cu/Sn packages with the rim widths of 25 ${\mu}m$ and 50 ${\mu}m$. However, voids were observed locally at the interfaces with the rim widths larger than 100 ${\mu}m$. Such voids were formed by local non-contact between the upper and lower rims due to the surface roughness of the electroplated Sn.