• Journal of the Korean Institute of Telematics and Electronics
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• v.10 no.5
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• pp.1-6
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• 1973

The paper deals with a study on an electronic watering device. The system is designed to scan 10 probes so that they detect moisture of soil. Input potentials are compared with reference level before the system is watering. rt provides a main clock oscillator and a control oscillator for the system control, and a programmable unijunction transistor is used for the control circuit. The reference levels are adjustable so as to water various soils. The device is tested for two different sails of moisture content ranging from 6 to 51%. It works at any input level higher than 0.6 V compared to the reference level.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.4
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• pp.42-50
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• 2003

This paper presents an embedded RC oscillator which has temperature compensation circuits. The conventional RC oscillator has frequency deviation about 15%, which is caused by variation of resistors and the reference voltage of schmitt trigger from the temperature condition. In this paper, the proposed circuit use a CMOS bandgap reference having balanced current temperature coefficients as a triggering voltage of schmitt trigger. The constant current sources consist of current mirror circuit with the positive and negative temperature coefficient. The proposed circuit shows less 3% frequency deviation for variation of temperature, supply voltage and process parameters.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.3
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• pp.153-159
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• 2009

A CMOS frequency synthesizer for $5{\sim}6$ GHz UNII-band sub-harmonic direct-conversion receiver has been developed. For quadrature down-conversion with sub-harmonic mixing, octa-phase local oscillator (LO) signals are generated by an integer-N type phase-locked loop (PLL) frequency synthesizer. The complex timing issue of feedback divider of the PLL with large division ratio is solved by using multimodulus prescaler. Phase noise of the local oscillator signal is improved by employing the ring-type LC-tank oscillator and switching its tail current source. Implemented in a $0.18{\mu}m$ CMOS technology, the phase noise of the LO signal is lower than -80 dBc/Hz and -113 dBc/Hz at 100 kHz and 1MHz offset, respect-tively. The measured reference spur is lower than -70 dBc and the power consumption is 40 m W from a 1.8 V supply voltage.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.8
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• pp.729-734
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• 2015

Improvement in the control strategy for continuous casting is a crucial requirement to enhance the slab's quality and to increase productivity. The mold oscillator adopts the dual cylinders due to its heavy weight, so the synchronized motion of two cylinders is an important aspect when precise control is needed. The conventional method uses the master-slave control applied to the valve input reference, but the synchronization performance should still be improved. This paper proposes a novel synchronization algorithm for dual cylinders used in a mold oscillator. The master-slave concept is applied to the target reference position, that is, the slave target reference position is controlled to match the slave cylinder's position with the master cylinder's position. In the simulation based on a Simulink model, the proposed algorithm shows a better synchronization performance in aspect of the mean of the absolute error and the peak synchronization error.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.6
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• pp.728-735
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• 2016

A 70 MHz temperature-compensated on-chip CMOS relaxation oscillator for mobile display driver ICs is proposed to reduce frequency variations. The proposed oscillator compensates for frequency variation with respect to temperature by adjusting the bias currents to control the change in delay of comparators with temperature. A bandgap reference (BGR) is used to stabilize the bias currents with respect to temperature and supply voltages. Additional temperature compensation for the generated frequency is achieved by optimizing the resistance in the BGR after measuring the output frequency. In addition, a trimming circuit is implemented to reduce frequency variation with respect to process. The proposed relaxation oscillator is fabricated using 45 nm CMOS technology and occupies an active area of $0.15mm^2$. The measured frequency variations with respect to temperature and supply voltages are as follows: (i) ${\pm}0.23%$ for changes in temperature from -30 to $75^{\circ}C$, (ii) ${\pm}0.14%$ for changes in $V_{DD1}$ from 2.2 to 2.8 V, and (iii) ${\pm}1.88%$ for changes in $V_{DD2}$ from 1.05 to 1.15 V.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.55 no.8
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• pp.399-403
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• 2006

An accurate constant output voltage provided by the analog memory cell may be used by the low power oscillator to generate an accurate low frequency output signal. This accurate low frequency output signal may be used to maintain long-term timing accuracy in host devices during sleep modes of operation when an external crystal is not available to provide a clock signal. Further, incorporation of the analog memory cell in the low power oscillator is fully implementable in a 0.35um Samsung standard CMOS process. Therefore, the analog memory cell incorporated into the low power oscillator avoids the previous problems in a oscillator by providing a temperature-stable, low power consumption, size-efficient method for generating an accurate reference clock signal that can be used to support long sleep mode operation.

• Journal of Astronomy and Space Sciences
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• v.27 no.2
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• pp.145-152
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• 2010

In this paper, we developed a local oscillator (LO) system of millimeter wave band receiver for radio astronomy observation. We measured the phase and amplitude drift stability of this LO system. The voltage control oscillator (VCO) of this LO system use the 3 mm band Gunn oscillator. We developed the digital phase locked loop (DPLL) module for the LO PLL function that can be computer-controlled. To verify the performance, we measured the output frequency/power and the phase/amplitude drift stability of the developed module and the commercial PLL module, respectively. We show the good performance of the LO system based on the developed PLL module from the measured data analysis. The test results and discussion will be useful tutorial reference to design the LO system for very long baseline interferometry (VLBI) receiver and single dish radio astronomy receiver at the 3 mm frequency band.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.8 s.350
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• pp.6-12
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• 2006

Recently, according to the rapid development of mobile system, the development of relative mobile components has been required, and especially, with the miniaturization of mobile component, the complex with nearby components has been progressed. In this paper, multi-output VC-TCXO (Voltage Controlled-Temperature Compensated Crystal Oscillator) for WCDMA integrates the additional CMOS inverter, so it can be the normal clipped sinewave output and additional CMOS output, and also it can be satisfied the VC-TCXO's requirements for WCDMA system. And the important characteristics of reference oscillator, like phase noise and frequency short term stability, are satisfied with WCDMA(UMTS) system's requirement In this paper, however, 25MHz is used for reference frequency, similarly and practically, we think that it can be used from 10MHz to 40MHz.

• Journal of the Korean Institute of Telematics and Electronics
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• v.12 no.3
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• pp.20-25
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• 1975

A microwave oscillator stabilized by a phase-locked loop (PLL) is developed. The PLL system is chosen 'compared with the cavity stabilized oscillator in view of the domestic manufacturing, because special machining and materials are needed for the latter. A sampler with a low pass filter is shown to be used as a phase detector in the PLL, and the sampler capable of sampling up to 4GHz is developed for this use. Frequency stability of about 10-6 is obtained from the developed microwave oscillator, operating at 2.16 GHz with more than 120 milliwatts output power, Ivhereby a crystal oscillator operating at about 110MHz is used as a reference source in the PLL. The capturing range of this oscillator is extended up to its lock-in-range of about 10MHz by employing a search oscillator in the system.

• 한국정보통신설비학회:학술대회논문집
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• 2008.08a
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• pp.441-446
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• 2008

In this papers, a PLDRO(Phase Locked Dielectric Resonator Oscillator) is designed and implemented at the oscillator in which fundamental frequency is 18.3 GHz. The proposed PLDRO so as to improve the PLDRO of the general structure is designed to the goal of the minimize of the size and the performance improvement. Three VCO(Voltage controlled Oscillator) and the power combiner improved the output power. A VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is manufactured using a varactor diode to tune oscillating frequency electrically, and its phase is locked to reference frequency by SPD(Sampling Phase Detector). This product is fabricated on Teflon substrate with dielectric constant 2.2 and device is ATF -13786 of Ka-band using. This PLDRO generates an output power of 5.67 dBm at 18.3 GHz and has the characteristics of a phase noise of -80.10 dBc/Hz at 1 kHz offset frequency from carrier, the second harmonic suppression of -33 dBc. The proposed PLDRO can be used in Ka-band satellite applications