• Journal of Korea Multimedia Society
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• v.11 no.11
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• pp.1555-1565
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• 2008

Biometric information such as face and fingerprint information is highlighted in many security areas, including authentication, due to its uniqueness and convenience factors. However, if exploited maliciously, it can cause more serious damage than traditional security measures, like passwords. This paper reviews the watermarking method that is able to verify the integrity of this biometric information. The watermark to be inserted is the date of the biometric information acquisition. It is combined with 16-bit Cyclic Redundancy Checks prior to insertion. In particular, face and fingerprint images are saved in a specific compressed format. The proposed watermarking algorithm will be designed in such a way as to remain resilient against compression. The watermark inserted at the acquisition stage will be extracted at each storage and deployment stage, so that the integrity of the biometric information can be verified.

• Journal of IKEEE
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• v.23 no.4
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• pp.1208-1217
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• 2019

The life-cycle prediction of the sub-module which is the unit system of MMC is very important from the viewpoint of maintenance and economic feasibility of HVDC system. However, the life-cycle prediction that considers only the type, number and combination of parts is a generalized result that does not take into account the operating condition of the sub-module, and may significantly differ from the life-cycle of the actual one. Therefore, we design a fault tree for the purpose of reflecting the operation characteristics of the full-bridge sub-module and apply the MIL-HDBK-217F to the failure rate of the basic event to predict the life-cycle of the full-bridge sub-module. It compares the life-cycle expectancy of the conventional failure rate analysis with the proposed fault-tree analysis and compares the lifetime according to whether the redundancy of the full-bridge sub-module is considered.

• The Journal of the Korea institute of electronic communication sciences
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• v.13 no.2
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• pp.333-340
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• 2018

This paper introduces a BCH code decoder using parallel CRC(: Cyclic Redundancy Check) generation. Using a conventional parallel syndrome generator with a LFSR(: Linear Feedback Shift Register), it takes up a lot of space for a short code. The proposed decoder uses the parallel CRC method that is widely used to compute the checksum. This scheme optimizes the a syndrome generator in the decoder by eliminating redundant xor operation compared with the parallel LFSR and thus minimizes chip area and propagation delay. In simulation results, the proposed decoder has accomplished propagation delay reduction of 2.01 ns as compared to the conventional scheme. The proposed decoder has been designed and synthesized in $0.35-{\mu}m$ CMOS process.

• Journal of Advanced Navigation Technology
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• v.14 no.2
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• pp.233-238
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• 2010

In this paper, we applied the forward and backward error recovery techniques to a reduced instruction set computer (risc) processor to develop two fault-tolerant processors, namely, fetch redundant risc (FRR) processor and a redundancy execute risc (RER) processor. To evaluate the fault-tolerance capability of three target processors, we developed the base risc processor, FRR processor, and RER processor in SystemC hardware description language. We performed fault injection experiment using the three SystemC processor models and the SystemC-based simulation fault injection technique. From the experiments, for the 1-bit transient fault, the failure rate of the FRR, RER, and base risc processor were 1%, 2.8%, and 8.9%, respectively. For the 1-bit permanent fault, the failure rate of the FRR, RER, and base risc processor were 4.3%, 6.5%, and 41%, respectively. As a result, for 1-bit fault, we found that the FRR processor is more reliable among three processors.

• Journal of Power Electronics
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• v.13 no.4
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• pp.679-691
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• 2013

High-power electromagnetic transmitter power supplies are an important part of deep geophysical exploration equipment. This is especially true in complex environments, where the ability to produce a highly accurate and stable output and safety through redundancy have become the key issues in the design of high-power electromagnetic transmitter power supplies. To solve these issues, a high-frequency switching power cascade based emission power supply is designed. By combining the circuit averaged model and the equivalent controlled source method, a modular mathematical model is established with the on-state loss and transformer induction loss being taken into account. A triple-loop control including an inner current loop, an outer voltage loop and a load current forward feedback, and a digitalized voltage/current sharing control method are proposed for the realization of the rapid, stable and highly accurate output of the system. By using a new algorithm referred to as GAPSO, which integrates a genetic algorithm and a particle swarm algorithm, the parameters of the controller are tuned. A multi-module cascade helps to achieve system redundancy. A simulation analysis of the open-loop system proves the accuracy of the established system and provides a better reflection of the characteristics of the power supply. A parameter tuning simulation proves the effectiveness of the GAPSO algorithm. A closed-loop simulation of the system and field geological exploration experiments demonstrate the effectiveness of the control method. This ensures both the system's excellent stability and the output's accuracy. It also ensures the accuracy of the established mathematical model as well as its ability to meet the requirements of practical field deep exploration.

• Proceedings of the KIEE Conference
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• 2003.11b
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• pp.295-298
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• 2003

In this paper, a novel maximum a posterion (MAP) estimation for the channel decoding of H.264 codes in the presence of transmission error is presented. Arithmetic codes with a forbidden symbol and trellis search techniques are employed in order to estimate the best transmitted. And, there has been growing interest of communication, the research about transmission of exact data is increasing. Unlike the case of voice transmission, noise has a fatal effect on the image transmission. The reason is that video coding standards have used the variable length coding. So, only one bit error affects the all video data compressed before resynchronization. For reasons of that, channel needs the channel codec, which is robust to channel error. But, usual channel decoder corrects the error only by channel error probability. So, designing source codec and channel codec, Instead of separating them, it is tried to combine them jointly. And many researches used the information of source redundancy In received data. But, these methods do not match to the video coding standards, because video ceding standards use not only one symbol but also many symbols in same data sequence. In this thesis, We try to design combined source-channel codec that is compatible with video coding standards. This MAP decoder is proposed by adding semantic structure and semantic constraint of video coding standards to the method using redundancy of the MAP decoders proposed previously. Then, We get the better performance than usual channel coder's.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.15 no.2
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• pp.57-63
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• 2001

This paper analysed the characteristic of Power consumption at many type of Inverter controlled Elevator. Especially, this paper proposed the standard value of full load currents. For this propose, it was classified by the passenger capacity and manufacture company. As a result, it is found that (i) the value is between -3[A] and 7[A] in case of elevator. That means the full load currents was smaller than the standard value of conventional operation type (ii) the value is between 0.5[kVA] and 3[kVA] in case of Power transformer. That means the transformer capacity was smaller than the standard value of conventional operation type. it was classified by the passenger capacity at inverter controlled elevator in apartment Also, to guarantee the operation stop of inverter controlled elevator, this paper proposed the redundancy method of electrical installations. the redundancy method is (i) 2 line service system and (ii) 2 distribution line system.

• Journal of Korea Society of Digital Industry and Information Management
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• v.11 no.3
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• pp.31-43
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• 2015

In this paper, we discuss a code generation technique for custom transport triggered architecture (TTA) from a high-level language structure. This methodology is implemented by using TTA-based Co-design Environment (TCE) tool. The results show how the scheduler exploits instruction level parallelism in the custom target architecture and source program. Thus, the scheduler generates parallel TTA instructions using lower cycle counts than the sequential scheduling algorithm. Moreover, we take Tensilica tool to make a comparison with TCE. Because of the efficiency of TTA, TCE takes less execution cycles compared to Tensilica configurations. Finally, this paper shows that it requires only 7 cycles to generate the parallel TTA instruction set for implementing Cyclic Redundancy Check (CRC) applications as an input design, and presents the code generation technique to move complexity from the processor software to hardware architecture. This method can be applicable lots of channel Codecs like CRC and source Codecs like High Efficiency Video Coding (HEVC).

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.4 no.3
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• pp.358-379
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• 2010

Multiple object association is an important capability in visual surveillance system with multiple cameras. In this paper, we introduce locally initiating line-based object association with the parallel projection camera model, which can be applicable to the situation without the common (ground) plane. The parallel projection camera model supports the camera movement (i.e. panning, tilting and zooming) by using the simple table based compensation for non-ideal camera parameters. We propose the threshold distance based homographic line generation algorithm. This takes account of uncertain parameters such as transformation error, height uncertainty of objects and synchronization issue between cameras. Thus, the proposed algorithm associates multiple objects on demand in the surveillance system where the camera movement dynamically changes. We verify the proposed method with actual image frames. Finally, we discuss the strategy to improve the association performance by using the temporal and spatial redundancy.

• Journal of Institute of Control, Robotics and Systems
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• v.16 no.8
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• pp.761-765
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• 2010

This paper presents the design of optimal fuzzy classifier for human detection by using genetic algorithms, one of the best-known meta-heuristic search methods. For this purpose, encoding scheme to search the optimal sequential intersection points between adjacent fuzzy membership functions is originally presented for the fuzzy classifier design for HOG (Histograms of Oriented Gradient) descriptors. The intersection points are sequentially encoded in the proposed encoding scheme to reduce the redundancy of search space occurred in the combinational problem. Furthermore, the fitness function is modified with the true-positive and true-negative of the confusion matrix instead of the total success rate. Experimental results show that the two proposed approaches give superior performance in HOG datasets.