• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.8 no.1
• /
• pp.25-32
• /
• 2007

We investigated the silicide reaction stability between 10 nm-Col-xNix alloy films and silicon substrates with the existence of 4 nm-thick natural oxide layers. We thermally evaporated 10 nm-Col-xNix alloy films by varying $x=0.1{\sim}0.9$ on naturally oxidized single crystal and 70 nm-thick polycrystalline silicon substrates. The films structures were annealed by rapid thermal annealing (RTA) from $600^{\circ}C$ to $1100^{\circ}C$ for 40 seconds with the purpose of silicidation. After the removal of residual metallic residue with sulfuric acid, the sheet resistance, microstructure, composition, and surface roughness were investigated using a four-point probe, a field emission scanning electron microscope, a field ion bean4 an X-ray diffractometer, and an Auger electron depth profiling spectroscope, respectively, to confirm the silicide reaction. The residual stress of silicon substrate was also analyzed using a micro-Raman spectrometer We report that the silicide reaction does not occur if natural oxides are present. Metallic oxide residues may be present on a polysilicon substrate at high silicidation temperatures. Huge residual stress is possible on a single crystal silicon substrate at high temperature, and these may result in micro-pinholes. Our results imply that the natural oxide layer removal process is of importance to ensure the successful completion of the silicide process with CoNi alloy films.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.9 no.1
• /
• pp.16-22
• /
• 2008

We fabricated thermally-evaporated 10 nm-Ni/30 nm and 70 nm Poly-Si/200 nm-$SiO_2/Si$ structures to investigate the thermal stability of nickel silicides formed by rapid thermal annealing(RTA) of the temperature of $300{\sim}1100^{\circ}C$ for 40 seconds. We employed for a four-point tester, field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), high resolution X-ray diffraction(HRIXRD), and scanning probe microscope(SPM) in order to examine the sheet resistance, in-plane microstructure, cross-sectional microstructure evolution, phase transformation, and surface roughness, respectively. The silicide on 30 nm polysilicon substrate was stable at temperature up to $900^{\circ}C$, while the one on 70 nm substrate showed the conventional $NiSi_2$ transformation temperature of $700^{\circ}C$. The HRXRD result also supported the existence of NiSi-phase up to $900^{\circ}C$ for the Ni silicide on the 30 nm polysilicon substrate. FE-SEM and TEM confirmed that 40 nm thick uniform silicide layer and island-like agglomerated silicide phase of $1{\mu}m$ pitch without residual polysilicon were formed on 30 nm polysilicon substrate at $700^{\circ}C\;and\;1000^{\circ}C$, respectively. All silicides were nonuniform and formed on top of the residual polysilicon for 70 nm polysilicon substrates. Through SPM analysis, we confirmed the surface roughness was below 17 nm, which implied the advantage on FUSI gate of CMOS process. Our results imply that we may tune the thermal stability of nickel monosilicide by reducing the height of polysilicon gate.

• Composites Research
• /
• v.29 no.1
• /
• pp.40-44
• /
• 2016

Nuclear fuel cladding used in a nuclear power plant must possess superior oxidation resistance in the coolant atmosphere of high temperature/high pressure. However, as was the case for the critical LOCA (loss-of-coolant accident) accident that took place in the Fukushima disaster, there is a risk of hydrogen explosion when the nuclear fuel cladding and steam reacts dramatically to cause a rapid high-temperature oxidation accompanied by generation of a huge amount of hydrogen. Hence, an active search is ongoing for an alternative material to be used for manufacturing of nuclear fuel cladding. Studies are currently aimed at improving the safety of this cladding. In particular, ceramic-based nuclear fuel cladding, such as SiC, is receiving much attention due to the excellent radiation resistance, high strength, chemical durability against oxidation and corrosion, and excellent thermal conduction of ceramics. In the present study, cladding with $SiC_f/SiC$ protective films was fabricated using a process that forms a matrix phase by polymer impregnation of polycarbosilane (PCS) after filament-winding the SiC fiber onto an existing Zry-4 cladding tube. It is analyzed the oxidation and microstructure of the metal cladding with $SiC_f/SiC$ composite protective films using a drop tube furnace for thermal shock test.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2015.08a
• /
• pp.86.2-86.2
• /
• 2015

Cu2ZnSn(S,Se)4 thin film solar cells have been fabricated using sputtered Cu/Sn/Zn metallic precursors on Mo coated sodalime glass substrate without using a toxic H2Se and H2S atmosphere. Cu/Sn/Zn metallic precursors with various thicknesses were prepared using DC magnetron sputtering process at room temperature. As-deposited metallic precursors were sulfo-selenized inside a graphite box containing S and Se pellets using rapid thermal processing furnace at various sulfur to selenium (S/Se) compositional ratio. Thin film solar cells were fabricated after sulfo-selenization process using a 65 nm CdS buffer, a 40 nm intrinsic ZnO, a 400 nm Al doped ZnO, and Al/Ni top metal contact. Effects of sulfur to selenium (S/Se) compositional ratio on the microstructure, crystallinity, electrical properties, and cell efficiencies have been studied using X-ray diffraction, Raman spectroscopy, field emission scanning electron microscope, I-V measurement system, solar simulator, quantum efficiency measurement system, and time resolved photoluminescence spectrometer. Our fabricated Cu2ZnSn(S,Se)4 thin film solar cell shows the best conversion efficiency of 9.24 % (Voc : 454.6 mV, Jsc : 32.14 mA/cm2, FF : 63.29 %, and active area : 0.433 cm2), which is the highest efficiency among Cu2ZnSn(S,Se)4 thin film solar cells prepared using sputter deposited metallic precursors and without using a toxic H2Se gas. Details about other experimental results will be discussed during the presentation.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.05b
• /
• pp.8-11
• /
• 2001

In this study. the recovery of plasma induced damage in the etched PZT thin film with $O_2$ re-annealing have been investigated. The PZT thin films were etched as a function of $Cl_2/Ar$ and additive $CF_4$ into $Cl_{2}(80%)/Ar(20)%$. The etch rates of PZT thin films were $1600\dot{A}/min$ at $Cl_{2}(80%)/Ar(20)%$ gas mixing ratio and $1970\dot{A}/min$ at 30 % additive $CF_4$ into $Cl_{2}(80%)/Ar(20)%$. The etched profile of PZT films was obtained above 70 by SEM. In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT phase revealed by x-ray diffraction (XRD). From XPS analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of TixOy is recovered by $O_2$ recombination during rapid thermal annealing process. From AFM images, it shows that the surface roughness of re-annealed sample after etching is improved.

• Journal of Sensor Science and Technology
• /
• v.26 no.6
• /
• pp.438-444
• /
• 2017

In this paper, we focus on optimization of the in-situ phosphorous (P) doping of low-pressure chemical vapor deposited (LPCVD) poly Si resistors for obtaining near-zero temperature coefficient of resistance (TCR) at temperature range from 25 to $600^{\circ}C$. The deposited poly Si films were annealed by rapid thermal anneal (RTA) process at the temperature range from 900 to $1000^{\circ}C$ for 90s in nitrogen ambient to relieve intrinsic stress and decrease the TCR in the poly Si layer and get the Ohmic contact. After the RTA process, a roughness of the thin film was slightly changed but the grain size and crystallinity of the thin film with the increase in anneal temperature. The film annealed at $1,000^{\circ}C$ showed the behavior of Schottky contact and had dislocations in the films. Ohmic contact and TCR of $334.4{\pm}8.2$ (ppm/K) within 4 inch wafer were obtained in the measuring temperature range of 25 to $600^{\circ}C$ for the optimized 200 nm thick-poly Si film with width/length of $20{\mu}m/1,800{\mu}m$. This shows the potential of in-situ P doped LPCVD poly Si as a resistor for pressure sensor in harsh environment applications.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2001.11b
• /
• pp.21-25
• /
• 2001

In this study, recovery of plasma etching· damage in PZT thin film with additive gas and re-annealing after etching have been investigated. The PZT thin films were etched as a function of $Cl_2/CF_4$ with addition of Ar and $O_2$ with inductively induced plasma. The etch rates of PZT thin films were 1450 $\AA$/min at 30% additive Ar into $(Cl_2(80%)+CF_4 (20%))$ and 1100 $\AA$/min at 10% additive $O_2$ into $C(Cl_2(80%)+CF_4(20%))$. In order to recovery properties of PZT thin films after etching, the etched PZT thin films were re-annealed at various temperatures in at $O_2$ atmosphere. From the hysteresis curves, ferroelectrical properties are improved by $O_2$ re-annealing process. The improvement of ferroelectric behavior at annealed sample is consistent with the increase of the (100) and (200) PZT peaks revealed by x-ray diffraction (XRD). From x-ray photoelectron spectroscopy (XPS) analysis, intensity of Pb-O, Zr-O and Ti-O peak are increased and the chemical residue peak is reduced by $O_2$ re-annealing. The ferroelectric behavior consistent with the dielectric nature of $Ti_xO_y$ is recovered by $O_2$ recombination during rapid thermal annealing process.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.6 no.3
• /
• pp.273-277
• /
• 2005

We prepared $0.25\~l.5um$ poly silicon gate array test group with $SiO_2$ spacers in order to employ NiCo composite salicide process from 15nm Ni/15nm Co/poly structure. We investigate the residual metal shape evolution by varying the rapid thermal silicide anneal temperature from $700^{\circ}C\;to\;1100^{\circ}C$. We observed the residual metals agglomerated into maze type and line type on $SiO_2$ field and silicide gate, respectively as temperature increased. We propose that lower silicide temperature would be favorable in newly proposed NiCo salicide in order to lessen the agglomeration causing the leakage and scum formation.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.404-405
• /
• 2011

Cu(InGa)$Se_2$ (CIGS) 박막 태양전지의 저가 및 대면적화를 위한 양산화 공정인 two-step process (sputter/selenization) 공정에서는 sputtering으로 형성한 metal precursor stack을 $H_2$ Se gas를 이용하여 selenization하는 공정을 주로 이용한다. 하지만 이러한 selenization 공정은 유독한 $H_2$ Se gas를 이용해야 한다는 점과 긴 시간 동안 열처리를 해야 하는 단점을 가지고 있다. 이에 metal precursor stack 위에 Se 막을 우선 증착하고, Rapid Thermal Process (RTP)를 이용하여 selenization하는 방법이 현재 많은 관심을 끌고 있다. 본 논문에서는 sputtering 이후 RTP를 이용한 CIGS 흡수층 제작에 대한 선행연구의 일환으로 co-evaporator 장비를 이용하여 다양한 구조의 precursor를 제작하고 RTP 조건에 따른 selenization 효과를 연구하였다. Co-evaporator를 이용하여 CIGS, CIG/Se, CuGa/In/Se, In/CuGa/Se 4가지 구조의 precursor stack을 Mo coated soda lime glass 위에 제작하였다. 이때 amorphous 상태의 precursor stack을 만들기 위하여 기판에 열은 가하여 주지 않았으며, 각각의 stack 구조에서 가지고 있는 Cu, In, Ga, Se의 총량을 동일하게 유지하기 위하여 각 stack의 증착 시간을 동일하게 유지하였다. Selenization을 위한 RTP 조건은 550, $600^{\circ}C$ 각각에 대하여 1, 5, 10분으로 split을 진행하였다. Precursor stack의 증착 후 관찰한 XRD 결과는 비정질 상태를 잘 나타내었으며, SEM 결과 CIGS precursor stack을 제외한 나머지 구조의 stack에서는 In 박막의 surface roughness로 인하여 박막의 평탄화가 좋지 않음을 확인하였다. CIGS precursor stack의 경우, RTP 온도와 시간 split와 상관없이 결정화가 잘 이루어졌으나 grain의 성장이 부족하였다. 이에 비하여 CIG/Se, CuGa/In/Se, In/CuGa/Se 구조의 precursor stack의 경우, $550^{\circ}C$ 열처리에서는 InSe의 결정상이 관찰 되었으며 $600^{\circ}C$, 5분 이상 열처리에서 CIGS 결정상이 관찰되었다. 이러한 결과는 Se이 metal 원소들과 함께 있는 CIGS 구조에 비하여 metal precursor stack 위에 Se을 증착한 stack 구조들의 경우는 CIGS 결정을 형성하기 위해 Se이 metal 층들로 확산되어 반응을 하여야 하므로 상대적으로 많은 열에너지가 필요한 것으로 이해할 수 있으며, RTP를 이용한 selenization 공정으로 CIGS 박막 태양전지의 흡수층 형성이 가능함을 확인하였다.

• Journal of Sensor Science and Technology
• /
• v.5 no.1
• /
• pp.63-70
• /
• 1996

Silicon epitaxial films of submicron level were successfully grown by the RTCVD method. For the growth of silicon epitaxial layers, $SiH_{2}Cl_{2}\;/\;H_{2}$ gas mixtures and various process parameters including $H_{2}$ prebake process were used. The growth conditions were varied to investigate their effects on the interface abruptness of doping profile, the film growth rates and crystalline properties. The crystallinity of the undoped silicon was excellent at the growth temperature of $900^{\circ}C$. The doping profiles were measured by SIMS technique. The abruptness of doping profile would be controlled within about $200{\AA}/decade$ in the structure of undoped Si / $n^{+}-Si$ substrate.