• 제목/요약/키워드: Rapid thermal process

검색결과 452건 처리시간 0.026초

Stress Dependence of Thermal Stability of Nickel Silicide for Nano MOSFETs

  • Zhang, Ying-Ying;Lee, Won-Jae;Zhong, Zhun;Li, Shi-Guang;Jung, Soon-Yen;Lee, Ga-Won;Wang, Jin-Suk;Lee, Hi-Deok;Lim, Sung-Kyu
    • Transactions on Electrical and Electronic Materials
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    • 제8권3호
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    • pp.110-114
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    • 2007
  • Dependence of the thermal stability of nickel silicide on the film stress of inter layer dielectric (ILD) layer has been investigated in this study and silicon nitride $(Si_3N_4)$ layer is used as an ILD layer. Nickel silicide was formed with a one-step rapid thermal process at $500^{\circ}C$ for 30 sec. $2000{\AA}$ thick $Si_3N_4$ layer was deposited using plasma enhanced chemical vapor deposition after the formation of Ni silicide and its stress was split from compressive stress to tensile stress by controlling the power of power sources. Stress level of each stress type was also split for thorough analysis. It is found that the thermal stability of nickel silicide strongly depends on the stress type as well as the stress level induced by the $Si_3N_4$ layer. In the case of high compressive stress, silicide agglomeration and its phase transformation from the low-resistivity nickel mono-silicide to the high-resistivity nickel di-silicide are retarded, and hence the thermal stability is obviously improved a lot. However, in the case of high tensile stress, the thermal stability shows the worst case among the stressed cases.

Dewetting된 Pt Islands를 Etch Mask로 사용한 GaN 나노구조 제작 (Fabrication of Nanostructures by Dry Etching Using Dewetted Pt Islands as Etch-masks)

  • 김택승;이지면
    • 한국재료학회지
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    • 제16권3호
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    • pp.151-156
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    • 2006
  • A method for fabrication of nano-scale GaN structure by inductively coupled plasma etching is proposed, exploiting a thermal dewetting of Pt thin film as an etch mask. The nano-scale Pt metal islands were formed by the dewetting of 2-dimensional film on $SiO_2$ dielectric materials during rapid thermal annealing process. For the case of 30 nm thick Pt films, pattern formation and dewetting was initiated at temperatures greater $600^{\circ}C$. Controlling the annealing temperature and time as well as the thickness of the Pt metal film affected the size and density of Pt islands. The activation energy for the formation of Pt metal island was calculated to be 23.2 KJ/mole. The islands show good resistance to dry etching by a $CF_4$ based plasma for dielectric etching indicating that the metal islands produced by dewetting are suitable for use as an etch mask in the fabrication of nano-scale structures.

Nano CMOS소자를 위한 Ni-silicide의 Dopant 의존성 분석 (Dependence on Dopant of Ni-silicide for Nano CMOS Device)

  • 배미숙;지희환;이헌진;오순영;윤장근;황빈봉;왕진석;이희덕
    • 대한전자공학회논문지SD
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    • 제40권11호
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    • pp.1-8
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    • 2003
  • 본 논문에서는 소스/드레인 및 게이트의 불순물에 따른 실리사이드의 의존성을 면저항과 단면 특성 등의 분석을 통하여 연구하였다. 급속 열처리 후에는 As, P, BF₂, B/sub 11/ 등과 같은 불순물에 대한 먼저항의 차이가 거의 나지 않았다. 하지만 실리사이드 형성 후히 고온 열처리시에 그 특성이 매우 크게 변화하였다. BF₂를 주입한 시편에서의 특성이 가장 좋게 나타난 반면, As를 주입한 실리사이드의 특성이 가장 열화되었다. BF₂를 주입한 시편에서의 실리사이드 특성 향상은 flourine에 의한 니켈의 확산 방지 때문인 것으로 여겨진다. 그러므로 실리사이드의 성능 향상을 위해 Ni의 확산을 방지시키는 것이 매우 필요하다.

Effect of Vacuum Annealing on Thin Film Nickel Silicide for Nano Scale CMOSFETs

  • Zhang, Ying-Ying;Oh, Soon-Young;Kim, Yong-Jin;Lee, Won-Jae;Zhong, Zhun;Jung, Soon-Yen;Li, Shi-Guang;Kim, Yeong-Cheol;Wang, Jin-Suk;Lee, Hi-Deok
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.10-11
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    • 2006
  • In this study, the Ni/Co/TiN (6/2/25 nm) structure was deposited for thermal stability estimation. Vacuum (30 mTorrs) annealing was carried out to compare with furnace annealing in nitrogen ambient. The proposed Ni/Co/TiN structure exhibited low temperature silicidation and wide range of rapid thermal process (RTP) windows. The sheet resistance was too high to measure after furnace annealing at $600^{\circ}C$ due to the thin thickness (15 nm) of the nickel silicide. However, the sheet resistance maintained stable characteristics up to $600^{\circ}C$ for 30 min after vacuum annealing. Therefore, the low resistance of thin film nickel silicide was obtained by vacuum annealing at $600^{\circ}C$.

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RF Magnetron Sputtering법으로 증착된 ZnNiO박막의 특성 (ZnNiO thin films deposited by r.f. magnetron sputtering method)

  • 오형택;이태경;김동우;박용주;박일우;김은규
    • 한국진공학회지
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    • 제12권4호
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    • pp.269-274
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    • 2003
  • The electrical, optical and structural properties of ZnNiO thin _ films deposited on Si substrates using rf-magnetron sputtering method have been investigated before and after the thermal annealing processes. The crystallinity of the ZnNiO thin film become degraded with increasing the Ni contents. This is mainly because the lattice of the thin film was expanded due to the oxygen-deficient conditions. Concerning the electrical properties of the thin film, the carrier concentration increases ($6.81\times10^{14}\textrm{cm}^{-2}$) and Hall mobility decreases (36.3 $\textrm{cm}^2$/Vㆍs) with higher doping concentration of Ni. However, the carrier concentration and Hall mobility became low ($1.10\times10^{14}\textrm{cm}^2$ and high (209.6 $\textrm{cm}^2$/Vㆍs), respectively, after the thermal annealing process at $1000 ^{\circ}C$. We also observed a strong luminescene center peaking at 546 nm in photoluminescence spectra, which was caused by a deep level center in the ZnO band gap with oxygen deficient ZnNiO structure.

Recent Progress in Understanding Solar Magnetic Reconnection

  • Lee, Jeongwoo
    • Journal of Astronomy and Space Sciences
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    • 제32권2호
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    • pp.101-112
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    • 2015
  • Magnetic reconnection is a fundamental process occurring in a wide range of astrophysical, heliospheric and laboratory plasmas. This process alters magnetic topology and triggers rapid conversion of magnetic energy into thermal heating and nonthermal particle acceleration. Efforts to understand the physics of magnetic reconnection have been made across multiple disciplines using remote observations of solar flares and in-situ measurements of geomagnetic storms and substorms as well as laboratory and numerical experiments. This review focuses on the progress achieved with solar flare observations in which most reconnection-related signatures could be resolved in both space and time. The emphasis is on various observable emission features in the low solar atmosphere which manifest the coronal magnetic reconnection because these two regions are magnetically connected to each other. The research and application perspectives of solar magnetic reconnection are briefly discussed and compared with those in other plasma environments.

Inkjet Printable Transparent Conducting Oxide Electrodes

  • 김한기
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2011년도 춘계학술발표대회
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    • pp.59.2-59.2
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    • 2011
  • We have demonstrated ink-jet printed indium tin oxide (ITO) and indium tin zinc oxide (IZTO) electrodes for cost-efficient organic solar cells (OSCs). By ink-jetting of crystalline ITO nano-particles and performing a rapid thermal anneal at $450^{\circ}C$, we were able to obtain directly patterned-ITO electrodes with an average transmittance of 84.14% and a sheet resistance of 202.7 Ohm/square without using a conventional photolithography process. The OSCs fabricated on the directly patterned ITO electrodes by ink-jet printing showed an open circuit voltage of 0.57 V, short circuit current of 8.47 mA/cm2, fill factor of 44%, and power conversion efficiency of 2.13%. This indicates that the ITO directly-patterned by ink-jet printing is a viable alternative to sputter-grown ITO electrodes for cost-efficient printing of OSCs due to the absence of a photolithography process for patterning and more efficient ITO material usage.

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1100 ${\AA}$의 베이스 폭을 갖는 다결정 실리콘 자기정렬 트랜지스터 특성 연구 (A Study on the Characteristics of PSA Bipolar Transistor with Thin Base Width of 1100 ${\AA}$)

  • 구용서;안철
    • 전자공학회논문지A
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    • 제30A권10호
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    • pp.41-50
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    • 1993
  • This paper describes the fabrication process and electrical characteristics of PSA (Polysilicon Self-Align) bipolar transistors with a thin base width of 1100.angs.. To realize this shallow junction depth, one-step rapid thermal annealing(RTA) technology has been applied instead of conventional furnace annealing process. It has been shown that the series resistances and parasitic capacitances are significantly reduced in the device with emitter area of 1${\times}4{\mu}m^{2}$. The switching speed of 2.4ns/gate was obtained by measuring the minimum propagation delay time in the I$^{2}$L ring oscillator with 31 stages.

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림성형 공정의 기포에 관한 연구 (A Study on Bubbles in The RIM Process)

  • 양화준;강대원;강영중;김성준;장태식;이일엽
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2001년도 춘계학술대회 논문집
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    • pp.303-306
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    • 2001
  • To shorten the delivery time for new products, a lot of prototype plastic parts manufacturing technologies have been developed including injection molding, vacuum casting, thermal forming and so on. Among them, RIM is becoming one of a important soft tooling methods to produce prototype and mass production parts within short time. Further more, as the rapid prototyping technology based tooling methods are playing an important role in prototype manufacturing industry, the utility of the RIM is increasing. But few analyses and mold design techniques have been developed so far due to its chemical and mechanical complexity during the packing and curing process. This research suggests mold gate design criteria to prevent bobbles from molded parts through simplified mathematical model and change of bubble sizes according to the geometry of the molded parts through experiments. Also this study shows the differences of bobble generation mechanism between RIM and injection molding.

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극히 얇은 코발트 실리사이드 접합을 위한 IIM 공정에 관한 연구 (A Study on IIM Process for Ultra-Shallow Cobalt Silicide Junctions)

  • 이석운;민경익;주승기
    • 전자공학회논문지A
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    • 제29A권8호
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    • pp.89-98
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    • 1992
  • IIM(Implantation Into Metal) process usning Co silicides has been investigated to obtain ultra-shallow junctions less than 0.1$\mu$m. Rapid Thermal Annealing using halogen lamps was employed to form CoSi$_2$ and junctions simultaneously.. Resistivities of CoSi$_2$ were 13-17$\mu$ $\Omega$-cm. CoSi$_2$/p$^{+}$/Si and CoSi$_2$/n$^{+}$/Si junction were formed by diffusion of B and As, respectively, from Co film. It was found out that B and As were severely lost by the evaporation during high temperature annealing Therefore SiO$_2$ capping layers were introduced to prevent the evaporation of the implanted dopants from the films. Investigation of the behavior of dopants with respect to annealing time revealed that increasing the annealing time enhanced the diffusion of dopants into Si from CoSi$_2$.

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