• 제목/요약/키워드: Rapid thermal process

검색결과 452건 처리시간 0.04초

저온 화학기상증착법 및 급속가열 공정을 이용한 그래핀의 합성 (Graphene Synthesis by Low Temperature Chemical Vapor Deposition and Rapid Thermal Anneal)

  • 임성규;문정훈;이희덕;유정호;양준모;왕진석
    • 한국전기전자재료학회논문지
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    • 제22권12호
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    • pp.1095-1099
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    • 2009
  • As a substitute material for silicon, we synthesized few layer graphene (FLG) by CVD process with a 300-nm-thick nickel film deposited on the silicon substrate and found out the lowest temperature for graphene synthesis. Raman spectroscopy study showed that the D peak (wave length : ${\sim}1,350\;cm^{-1}$) of graphene was minimized and then the 2D one (wave length : ${sim}2,700\;cm^{-1}$) appeared when rapid thermal anneal is carried out with the $C_2H_2$ treated nickel film. This study demonstrates that a high quality FLG formed at a low temperature of $400^{\circ}C$ is applicable as CMOS devices and transparent electrode materials.

나노급 CMOSFET을 위한 니켈-코발트 합금을 이용한 니켈-실리사이드의 열안정성 개선 (Thermal Stability Improvement of Ni-Silicide using Ni-Co alloy for Nano-scale CMOSFET)

  • 박기영;정순연;한인식;장잉잉;종준;이세광;이가원;왕진석;이희덕
    • 한국전기전자재료학회논문지
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    • 제21권1호
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    • pp.18-22
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    • 2008
  • In this paper, the Ni-Co alloy was used for thermal stability estimation comparison with Ni structure. The proposed Ni/Ni-Co structure exhibited wider range of rapid thermal process windows, lower sheet resistance in spite of high temperature annealing up to $700^{\circ}C$ for 30 min, more uniform interface via FE-SEM analysis, NiSi phase peak. Therefore, The proposed Ni/Ni-Co structure is highly promising for highly thermal immune Ni-silicide for nano-scale MOSFET technology.

Numerical Simulation on Startup Transient Performance of a Centrifugal Pump

  • Chen, Gang;Shao, Jie;Wu, Yulin;Liu, Shuhong;Cao, Guangjun
    • 한국추진공학회:학술대회논문집
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    • 한국추진공학회 2008년 영문 학술대회
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    • pp.751-755
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    • 2008
  • During the rapid startup transient of a centrifugal pump, in order to investigate its transient characteristics, the torque equations are deduced. Based on these equations, numerical simulation is carried out with the Large Eddy Simulation(LES) method and UDFs(User Defined Functions) are applied during the simulation. Comparison between simulation and experiment results of pump heads and rotational speed shows that they are in good agreement, indicating that the dynamic characteristics of this pump can be predicted accurate comparatively through simulation with LES method during its startup process.

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급속열처리 조건에 따른 II-VI 화합물 태양전지용 CdS 박막의 특성변화 (Effect of Rapid Thermal Process on Properties of CdS Thin Films for II-VI Compound Solar Cell)

  • 최시혁;박승범;김정연;송우창;임동건
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 하계학술대회 논문집
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    • pp.110-111
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    • 2009
  • 상온에서 밴드갭이 2.42 eV의 에너지를 가지며 직접 에너지 밴드갭을 갖는 고감도의 광전도체로 태양전지의 광투과 물질로 각광을 받고 있으며 광전도 cell로 연구되고 있는 CdS(Cadmium sulfide)를 용액 성장법(CBD)으로 제조하여 박막의 결정립의 향상과 박막내의 결함 등을 제거하기 위해 RTP(Rapid Thermal Process)를 이용하여 열처리 분위기 $N_2$, 처리시간 10분을 기준으로 열처리온도 ($300\;^{\circ}C$, $400\;^{\circ}C$, $500\;^{\circ}C$)를 변화시키며 박막의 전기적, 광학적 특성을 조사하였다. 캐리어 밀도가 급격히 낮아지고 이동도가 증가한 $500\;^{\circ}C$에서 $1.29\times10^3\;{\Omega} m$ 비저항을 나타냈다. 가시광선 영역에서 76.28%의 투과율을 보이는 특성을 나타내었다.

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E-빔 증착된 Sn 전구체의 황화 열처리 온도 및 시간에 따른 SnSx 박막 성장 효과 (Effect of the Sulfurization Temperature and Annealing Time of E-Beam Evaporated Sn Precursors on the Growth of SnSx Thin Films)

  • 황팅지엔;김제하
    • 한국전기전자재료학회논문지
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    • 제30권11호
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    • pp.734-739
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    • 2017
  • We prepared $SnS_x$ thin films on both soda-lime glass (SLG) and molybdenum(Mo)/SLG substrates by a two-step process using a Sn precursor followed by sulfur reaction in rapid thermal annealing (RTA) at different sulfurization temperatures ($Ts=200^{\circ}C$, $230^{\circ}C$, $250^{\circ}C$, and $300^{\circ}C$) and annealing times ($t_s=10min$ and 30 min). The single SnS phase was dominant for $200^{\circ}C{\leq}T_s$<$250^{\circ}C$, while an additional phase of $SnS_2$ was appeared at $T_s{\geq}250^{\circ}C$ alongside SnS. The SnS grains in all the samples showed strong growth along the preferred [040] direction. The band-gap energy ($E_g$) of the films was estimated to be 1.24 eV.

소성 조건과 Zr/Ti 몰비에 따른 졸겔 $Pb(Zr_{1-x}Ti_x)O_3$ 박막의 구조 및 강유전 특성 (Structural and ferroelectric characteristics of sol-gel $Pb(Zr_{1-x}Ti_x)O_3$ thin films according to the sintering conditions and Zr/Ti mol%)

  • 김준한;윤현상;박정흠;장낙원;박창엽
    • E2M - 전기 전자와 첨단 소재
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    • 제9권8호
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    • pp.836-850
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    • 1996
  • In this study, we have analyzed structural analysis and measured ferroelectric characteristics of PZT thin films prepared by sol gel process with different sintering conditions and different Zr/Ti mot%. When the Zr mot% of PZT thin film was increased, it was found that the remanent. polarization and coercive field were decreased and increased, respectively. Also, the maxium dielectric constant of PZT(50/50) thin film was 786.8. We got double hysteresis(anti-fcrroelectric) curve from PbZrO$_{3}$ thin film. As heating rate goes up, pyrochlore phase of PZT thin film was decreased and dielectric and ferroelectric characteristics were improved. As a result of variation of sintering temperature and time 500.deg. C-800.deg. C and 5 sec.-8 hours, respectively, we got optimal sintering temperature and time. The optimium sintering temperature and time of conventional furnace method and rapid thermal processing method were 650.deg. C-700.deg. C for 30-60 minutes and 700.deg. C/20 seconds-2 minutes, respectively.

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이온 주입된 ZnO 박막의 전기적 특성 연구 (Investigation on the Electrical Properties of Ion Implanted ZnO Thin Film)

  • 강홍성;임성훈;장현우;김건희;김종훈;이상렬;이중건
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2005년도 추계학술대회 논문집 Vol.18
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    • pp.49-50
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    • 2005
  • Nitrogen and phosphorus ions were implanted into ZnO thin film fabricated by pulsed laser deposition. ion implanted ZnO thin films were annealed from $700^{\circ}C$ to $1000^{\circ}C$ using rapid thermal annealing process. The electron concentration was changed form $10^{20}$ to $10^{18}/cm^3$. Effect of nitrogen and phosphorus in ZnO thin films was certified and the structural and optical properties of nitrogen and phosphorus doped ZnO thin films depending on concentration of nitrogen and phosphorus were investigated.

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DFSS 기법을 이용한 RTP 성형기의 대면적 전사성 향상 (Improvement of Large Area Replicability Using DFSS in RTP System)

  • 홍석관;김흥규;허영무;강정진
    • 한국정밀공학회:학술대회논문집
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    • 한국정밀공학회 2006년도 춘계학술대회 논문집
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    • pp.571-572
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    • 2006
  • RTP (rapid thermal pressing), one of micro-pattern replication techniques like hot embossing, is focused on achieving shorter cycle time. DFSS(Design for Six Sigma) has been applied in order to enhance the completeness of the development process for RTP system. According to DIDOV roadmap, we derived design concepts and subsequently decided the main performances, design factors, and components for RTP system. In the design process of RTP system using finite element analysis, it was realized that its structural characteristics affect large area replicability. Optimizing structural design factors, based on CAE, it was checked out that its large area replicability could be improved in a virtual test. Finally, we have a plan to validate the large area replicability of the developed RTP system, by performing micro-pattern replication tests with polymeric sheets.

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고속 열확산 공정에 의해 형성된 Phosphorus Source/Drain을 갖는 NMOS 트랜지스터의 특성 (Characteristics of NMOS Transistors with Phosphorus Source/Drain Formed by Rapid Thermal Diffusion)

  • 조병진;김정규;김충기
    • 대한전자공학회논문지
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    • 제27권9호
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    • pp.1409-1418
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    • 1990
  • Characteristics of NMOS transistors with phosphorus source/drain junctions formed by two-step rapid thermal diffusion (RTD) process using a solid diffusion source have been investigated. Phosphorus profiles after RTD were measured by SIMS analysis. In the case of 1100\ulcorner, 10sec RTD of, P, the specific contact resistance of n+ Si-Al was 2.4x10**-7 \ulcorner-cm\ulcorner which is 1/5 of the As junction The comparison fo P junction devices formed by RTD and conventional As junction devices shows that both short channel effect and hot carrier effect of P junction devices are smaller than those of As junction devices when the devices have same junction depths. P junction device had maximum of 0.4 times lower Isub/Id than As junction device. Characteristics of P junction formed by several different RTD conditions have been compared and 1000\ulcorner RTD sample had the smaller hot carrier generation. Also, it has been shown that the hot carrier generation can be futher reduced by forming the P junctions by 3-step RTD which has RTO-driven-in process additionally.

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