• Title/Summary/Keyword: Random delay

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EXISTENCE UNIQUENESS AND STABILITY OF NONLOCAL NEUTRAL STOCHASTIC DIFFERENTIAL EQUATIONS WITH RANDOM IMPULSES AND POISSON JUMPS

  • CHALISHAJAR, DIMPLEKUMAR;RAMKUMAR, K.;RAVIKUMAR, K.;COX, EOFF
    • Journal of Applied and Pure Mathematics
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    • v.4 no.3_4
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    • pp.107-122
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    • 2022
  • This manuscript aims to investigate the existence, uniqueness, and stability of non-local random impulsive neutral stochastic differential time delay equations (NRINSDEs) with Poisson jumps. First, we prove the existence of mild solutions to this equation using the Banach fixed point theorem. Next, we demonstrate the stability via continuous dependence initial value. Our study extends the work of Wang, and Wu [16] where the time delay is addressed by the prescribed phase space 𝓑 (defined in Section 3). To illustrate the theory, we also provide an example of our methods. Using our results, one could investigate the controllability of random impulsive neutral stochastic differential equations with finite/infinite states. Moreover, one could extend this study to analyze the controllability of fractional-order of NRINSDEs with Poisson jumps as well.

Vehicle Arbitration by Dynamic Random Delay Counter Method (동적 랜덤지연계수법에 의한 차량 중재 기법)

  • 장명덕;서재홍김용득
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.747-750
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    • 1998
  • This paper deals with the vehicle arbitration algorithm used in communication system between vehicles and a roadside control unit. To Improve the performance of vehicle arbitration, a random delay counter method is taken into account and modified to select the optimal maximum count value according to the vehicle arrival rate. The suggested algorithm is tested by computer simulation andthe enhanced performance was shown. This method could be applied to various systems which include the communications between transponders and a control unit.

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A Jitter Suppressed DLL-Based Clock Generator (지연 고정 루프 기반의 지터 억제 클록 발생기)

  • Choi, Young-Shig;Ko, Gi-Yeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.7
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    • pp.1261-1266
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    • 2017
  • A random and systematic jitter suppressed delay locked loop (DLL)-based clock generator with a delay-time voltage variance converter (DVVC) and an averaging circuit (AC) is presented. The DVVC senses the delay variance of each delay stage and generates a voltage. The AC averages the output voltages of two consecutive DVVCs to suppress the systematic and random delay variance of each delay stage in the VCDL. The DVVC and AC averages the delay time of successive delay stages and equalizes the delay time of all delay stages. In addition, a capacitor with a switch working effectively as a negative feedback function is introduced to reduce the variation of the loop filter output voltage. Measurement results of the DLL-based clock generator fabricated in a one-poly six-metal $0.18{\mu}m$ CMOS process shows 13.4-ps rms jitter.

Chroma Interpolation using FIR Filter and Linear Filter (FIR필터와 선형필터를 이용한 색차 보간법)

  • Kim, Jeong-Pil;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.16 no.4
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    • pp.624-634
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    • 2011
  • Recently, the JCT-VC is developing the next generation video coding standard that is called HEVC. HEVC has adopted many coding technologies increasing coding efficiency. For chroma interpolation, DCT-based interpolation filter showing better performance than the linear filter in H.264/AVC was adopted in HEVC. In this paper, a combined filter that utilizes the FIR filter and the linear filter in H.264/AVC is proposed to increase coding efficiency. When the proposed method is compared with DCT-based interpolation filter, the experimental results for various sequences show that the average BD-rate improvements on chroma U and V components are 0.9% and 1.1%, respectively, in the high efficiency case of random access structure, those on U and V components are 1.1% and 1.1%, respectively, in the low complexity case of random access structure, those on U and V components are 0.9% and 1.4%, respectively, in the high efficiency case of low delay structure, and those on U and V components are 1.8% and 1.8%, respectively, in the low complexity case of low delay structure.

Analyzing the Impact of Buffer Capacity on Crosspoint-Queued Switch Performance

  • Chen, Guo;Zhao, Youjian;Pei, Dan;Sun, Yongqian
    • Journal of Communications and Networks
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    • v.18 no.3
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    • pp.523-530
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    • 2016
  • We use both theoretical analysis and simulations to study the impact of crosspoint-queued (CQ) buffer size on CQ switch throughput and delay performance under different traffic models, input loads, and scheduling algorithms. In this paper, we present the following. 1) We prove the stability of CQ switch using any work-conserving scheduling algorithm. 2) We present an exact closed-form formula for the CQ switch throughput and a non-closed-form but convergent formula for its delay using static non-work-conserving random scheduling algorithms with any given buffer size under independent Bernoulli traffic. 3) We show that the above results can serve as a conservative guide on deciding the required buffer size in pure CQ switches using work-conserving algorithms such as the random scheduling, under independent Bernoulli traffic. 4) Furthermore, our simulation results under real-trace traffic show that simple round-robin and random work-conserving algorithms can achieve quite good throughput and delay performance with a feasible crosspoint buffer size. Our work reveals the impact of buffer size on the CQ switch performance and provides a theoretical guide on designing the buffer size in pure CQ switch, which is an important step toward building ultra-high-speed switch fabrics.

Dynamic Random Channel Allocation Algorithm by Limiting the Number of Minimum RCH in HIPERLAN/2 (HIPERLAN/2에서 최소 RCH 수를 제한한 동적 랜덤채널 할당 기법)

  • Kang, Jae-Eun;Lee, Jong-Kyu
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.1A
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    • pp.58-64
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    • 2009
  • In this paper, we propose an dynamic random channel allocation scheme increasing probability of channel acquisition and reducing delay by limiting the number of minimum RCHs(Random CHannels) as an optimal factor $\beta$. The MAC protocol of HIPERLAN/2 is based on TDMA/TDD and MT(Mobile Terminal) can obtain chance of traffic transmission through channel competition in RCH period. And AP(Access Point) can dynamically schedule the number of RCHs based on the number of the collision in each RCH of the previous frame. Therefore, the proposed scheme increases a probability of channel acquisition and reduces delay by means of guaranteeing the number of minimum RCHs. With a practical Internet traffic, it is concluded that by the proposed scheme the delay reduction of the order of 19% and slightly better throughput are obtained compared to the conventional algorithm.

A study on random access protocol based on reservation access for WDM passive star coupler network (WDM passive star coupler 망에서 예약 방식에 기반한 임의 접근 프로토콜에 관한 연구)

  • 백선욱;최양희;김종상
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.4
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    • pp.893-910
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    • 1996
  • Recently, there ary many researches on local area multichannel network as WDM technology developes. An ideal media access protocol in a multichannel network is one that shows short access delay under low load and high throughput under heavy load. This paper proposed a new media access protocol for WDM passive star coupler network. The proposed one is a random access rpotocol based on reservation. Access delay is short under low load by using random access method, and high throughput is achieved under heavy load by usin greservation access. Analytic model for the performance analysis of the proposed protocol is developed and performance of the proposed protocol is compared with the previous ones. The effect on the performance of the number of the nodes and channels, and the number of transceivers in each node are analyzed.

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A Weighted Random Pattern Testing Technique for Path Delay Fault Detection in Combinational Logic Circuits (조합 논리 회로의 경로 지연 고장 검출을 위한 가중화 임의 패턴 테스트 기법)

  • 허용민;임인칠
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.12
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    • pp.229-240
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    • 1995
  • This paper proposes a new weighted random pattern testing technique to detect path delay faults in combinational logic circuits. When computing the probability of signal transition at primitive logic elements of CUT(Circuit Under Test) by the primary input, the proposed technique uses the information on the structure of CUT for initialization vectors and vectors generated by pseudo random pattern generator for test vectors. We can sensitize many paths by allocating a weight value on signal lines considering the difference of the levels of logic elements. We show that the proposed technique outperforms existing testing method in terms of test length and fault coverage using ISCAS '85 benchmark circuits. We also show that the proposed testing technique generates more robust test vectors for the longest and near-longest paths.

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THE EFFECT OF MASKED SIGNAL ON THE PERFORMANCE OF GNSS CODE TRACKING SYSTEM

  • Chang, Chung-Liang;Juang, Jyh-Ching
    • Proceedings of the Korean Institute of Navigation and Port Research Conference
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    • v.2
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    • pp.223-228
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    • 2006
  • The main purpose of this paper is to describe the code tracking performance of a non-coherent digital delay lock loop (DLL) or coherent DLL while tracking GNSS signal in the presence of signal masking. The masking effect is usually caused by buildings that obscure the signal in either a periodic or random manner. In some cases, ideal masking is used to remove random or periodic interference. Three types of the masked signal are considered - no masking, periodic masking, and random masking of the signal input to the receiver. The mean time to lose lock (MTLL) of the code tracking loop are evaluated, and some numerical result and simulation results are reported. Finally, the steadystate tracking errors on the performance of the tracking loop in interference environment are also presented.

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Random access method for radio interface specification of IMT-2000 satellite component (IMT-2000 위성부문 무선인터페이스 표준을 위한 임의 접속 기법)

  • 임광재;김수영
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.26 no.11B
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    • pp.1583-1594
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    • 2001
  • In this paper, the transmission structure and procedure of a random access channel for the IMT-2000 satellite radio specification are presented. The proposed random access method has much commonality with that of the 3GPP FD specification which is a terrestrial radio interface of IMT-2000. The proposed method was designed by considering characteristics of satellite link as we71 as the commonality with the terrestrial component. A preamble consists of sub-preamble repetition and a message is transmitted along with the preamble successively. The propose method has fast indication of preamble acquisition by physical layer. The proposed method has been included in the SAT-CDMA which is a radio transmission technology Proposed by TTA, KOREA and approved as a satellite radio interface at ITU-R. Additionally, in this Paper the signaling delay for the proposed random access channel will be analyzed and it will be compared to that of the random access methods using a conventional ALOHA procedure and the 3GPP procedure in aspect of the signaling delay. When the SAT-CDMA satellite constellation at the height of about 1600 km is considered, the delay of the proposed method was estimated to 100 ms less than that of the conventional ALOHA. This delay difference increases with 7he number of retransmissions. The delay is reduced by 30 ms, compared with the 3GPP method.

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