• 한국산업정보학회논문지
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• 제19권6호
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• pp.33-41
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• 2014

본 논문에서는 QCA(quantum-dot cellular automata) 클록킹(clocking) 방식의 D 플립 플롭의 구조를 제안하고, 이를 이용하여 프로그램 가능한 양자점 셀(programmable quantum-dot cell: QPCA) 구조를 설계한다. 기존의 QCA 상에서 제안된 D 플립플롭은 클록 펄스의 신호로 동작을 수행하기 때문에 이에 대한 입력 값을 임의로 설정해야 하고, QCA 클록킹과 중복되어 사용하기 때문에 낭비되는 출력 값들이 존재했다. 이러한 단점을 개선하기 위해서 이진 배선과 클록킹 기법을 이용하여 새로운 형태의 D 플립플롭을 제안하고, 이를 이용하여 QPCA 구조를 설계한다. 이 구조는 입력을 제어하는 배선 제어 회로, 규칙 제어 회로, D 플립플롭, 그리고 XOR 논리 게이트로 구성된다. 설계된 QPCA 구조는 QCADesigner를 이용하여 시뮬레이션을 수행하고, 그 결과를 기존의 D 플립플롭을 이용하여 설계한 것과 비교 분석하여 효율성을 확인한다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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• pp.254-254
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• 2011

The memories with nano-particles are very attractive because they are promising candidates for low operating voltage, long retention time and fast program/erase speed. In recent, various nano-floating gate memories with metal-oxide nanocrystals embedded in organic and inorganic layers have been reported. Because of the carrier generation in semiconductor, induced photon pulse enhanced the program/erase speed of memory device. We studied photo-induced electrical properties of these metal-oxide nanocrystal memory devices. At first, 2~10-nm-thick Sn and In metals were deposited by using thermal evaporation onto Si wafer including a channel with $n^+$ poly-Si source/drain in which the length and width are 10 ${\mu}m$ each. Then, a poly-amic-acid (PAA) was spin coated on the deposited Sn film. The PAA precursor used in this study was prepared by dissolving biphenyl-tetracarboxylic dianhydride-phenylene diamine (BPDA-PDA) commercial polyamic acid in N-methyl-2-pyrrolidon (NMP). Then the samples were cured at 400$^{\circ}C$ for 1 hour in N atmosphere after drying at 135$^{\circ}C$ for 30 min through rapid thermal annealing. The deposition of aluminum layer with thickness of 200 nm was followed by using a thermal evaporator, and then the gate electrode was defined by photolithography and etching. The electrical properties were measured at room temperature using an HP4156a precision semiconductor parameter analyzer and an Agilent 81101A pulse generator. Also, the optical pulse for the study on photo-induced electrical properties was applied by Xeon lamp light source and a monochromator system.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2011년도 추계학술발표대회
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• pp.20.1-20.1
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• 2011

The nano-sized quantum structure has been an attractive candidate for investigations of the fundamental physical properties and potential applications of next-generation electronic devices. Metal nano-particles form deep quantum wells between control and tunnel oxides due to a difference in work functions. The charge storage capacity of nanoparticles has led to their use in the development of nano-floating gate memory (NFGM) devices. When compared with conventional floating gate memory devices, NFGM devices offer a number of advantages that have attracted a great deal of attention: a greater inherent scalability, better endurance, a faster write/erase speed, and more processes that are compatible with conventional silicon processes. To improve the performance of NFGM, metal nanocrystals such as Au, Ag, Ni Pt, and W have been proposed due to superior density, a strong coupling with the conduction channel, a wide range of work function selectivity, and a small energy perturbation. In the present study, bismuth metal nanocrystals were self-assembled within high-k $Bi_2Mg_{2/3}Nb_{4/3}O_7$ (BMN) films grown at room temperature in Ar ambient via radio-frequency magnetron sputtering. The work function of the bismuth metal nanocrystals (4.34 eV) was important for nanocrystal-based nonvolatile memory (NVM) applications. If transparent NFGM devices can be integrated with transparent solar cells, non-volatile memory fields will open a new platform for flexible electron devices.

• 한국항행학회논문지
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• 제14권5호
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• pp.710-717
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• 2010

Quaternary 논리에서 생성 가능한 1-qudit(1-variable quantum digit) 함수는 총 256개가 존재하지만 이들 중에서 가장 유용한 것은 "0,1,2,3"의 치환에 의해 $Ax^C$+D(GF4)형의 QGFSOP 표현이 가능한 24개이다. 본 논문에서는 24개 1-qudit 함수들의 $Ax^C$+D(GF4) 연산에서 피연산자인 피승수 A와 피기수 D를 다단 종속된 치환리터럴의 제어인자로 사용하는 치환리터럴(Permutational Literals, PL) 표현과 QPL(Quaternary PL) gate를 제안하였다. 그리고 상호치환 'ab', 가산 '+D', 그리고 승산 'xA'과 같은 세 개의 PL 연산자를 사용하여 QGFSOP 표현된 24개 (1-qudit) 함수를 합성하기 위한 PL 합성법을 제안하였다. 끝으로 PL 합성법을 실현하기 위한 $Ax^C$+D(GF4) 구조와 연산회로 및 CMOS 실현 방법을 제시하였다.

• Progress in Superconductivity
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• 제4권1호
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• pp.1-9
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• 2002

Transferring single flux quanta across a Josephson junction at an exactly determined rate has made highly precise voltage measurements possible. Making use of self-shunted Nb-based SINIS junctions, programmable fast-switching DC voltage standards with output voltages of up to 10 V were produced. This development is now extended from fundamental DC measurements to the precise determination of AC voltages with arbitrary waveforms. Integrated RSFQ circuits will help to replace expensive semiconductor devices for frequency control and signal coding. Easy-to-handle AC and inexpensive quantum voltmeters of fundamental accuracy would be of interest to industry. In analogy to the development in the flux regime, metallic nanocircuits comprising small-area tunnel junctions and providing the coherent transport of single electrons might play an important role in quantum current metrology. By precise counting of single charges these circuits allow prototypes of quantum standards for electric current and capacitance to be realised. Replacing single electron devices by single Cooper pair circuits, the charge transfer rates and thus the quantum currents could be significantly increased. Recently, the principles of the gate-controlled transfer of individual Cooper pairs in superconducting A1 devices in different electromagnetic environments were demonstrated. The characteristics of these quantum coherent circuits can be improved by replacing the small aluminum tunnel Junctions by niobium junctions. Due to the higher value of the superconducting energy gap ($\Delta_{Nb}$ ＝ $7\Delta_{Al}$), the characteristic energy and the frequency scales for Nb devices are substantially extended as compared to A1 devices. Although the fabrication of small Nb junctions presents a real challenge, the Nb-based metrological devices will be faster and more accurate in operation. Moreover, the Nb-based Cooper pair electrometer could be coupled to an Nb single Cooper pair qubit which can be beneficial for both, the stability of the qubit and its readout with a large signal-to-noise ratio..

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권1호
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• pp.131-144
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• 2015

An extensive investigation of the influence of gate engineering on the CNTFET switching, high frequency and circuit level performance has been carried out. At device level, the effects of gate engineering on the switching and high frequency characteristics for CNTFET have been theoretically investigated by using a quantum kinetic model. It is revealed that hetero - material - gate CNTFET(HMG - CNTFET) structure can significantly reduce leakage current, enhance control ability of the gate on channel, and is more suitable for use in low power and high frequency circuits. At circuit level, using the HSPICE with look - up table(LUT) based Verilog - A models, the performance parameters of circuits have been calculated and the optimum combinations of ${\Phi}_{M1}/{\Phi}_{M2}/{\Phi}_{M3}$ have been concluded in terms of power consumption, average delay, stability, energy consumption and power - delay product(PDP). We show that, compared to a traditional CNTFET - based circuit, the one based on HMG - CNTFET has a significantly better performance (SNM, energy, PDP). In addition, results also illustrate that HMG - CNTFET circuits have a consistent trend in delay, power, and PDP with respect to the transistor size, indicating that gate engineering of CNTFETs is a promising technology. Our results may be useful for designing and optimizing CNTFET devices and circuits.

• 방사선산업학회지
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• 제6권1호
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• pp.31-40
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• 2012

There are two methods to fabricate the readout electronic to a large-area CMOS image sensor (LACIS). One is to design and manufacture the sensor part and signal processing electronics in a single chip and the other is to integrate both parts with bump bonding or wire bonding after manufacturing both parts separately. The latter method has an advantage of the high yield because the optimized and specialized fabrication process can be chosen in designing and manufacturing each part. In this paper, LACIS chip, that is optimized design for the latter method of fabrication, is presented. The LACIS chip consists of a 3-TR pixel photodiode array, row driver (or called as a gate driver) circuit, and bonding pads to the external readout ICs. Among 4 types of the photodiode structure available in a standard CMOS process, $N_{photo}/P_{epi}$ type photodiode showed the highest quantum efficiency in the simulation study, though it requires one additional mask to control the doping concentration of $N_{photo}$ layer. The optimized channel widths and lengths of 3 pixel transistors are also determined by simulation. The select transistor is not significantly affected by channel length and width. But source follower transistor is strongly influenced by length and width. In row driver, to reduce signal time delay by high capacitance at output node, three stage inverter drivers are used. And channel width of the inverter driver increases gradually in each step. The sensor has very long metal wire that is about 170 mm. The repeater consisted of inverters is applied proper amount of pixel rows. It can help to reduce the long metal-line delay.

• 전자공학회논문지A
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• 제29A권4호
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• pp.33-37
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• 1992

AlGaAs/GaAs quantum well delta-doped channel FET's have been successfully fabricated using by low-pressure metalorganic chemical vapor deposition(LP-MOCVD). The FET's with a gate dimension of 1.8$\mu$m $\times$ 100$\mu$m have a maximum transconductance of 190 mS/mm and a maximum current density of 425 mA/nm. The devices show extremely broad transconductances with a large voltage swing of 2.4V. The S-parameter measurements have indicated that the current gain and power gain cutoff frequencies of the device were 7 and 15 GHz, respectively. These values are among the best performance reported for GaAs based heterojunction FET's with a similar device geometry.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.13-13
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• 2011

Graphene based nano-electronic and nano-electromechanical devices will be introduced in this presentation. The first part of the presentation will be covered by our recent results on the fabrication and physical properties of artificially twisted bilayer graphene. Thanks to the recently developed contact transfer printing method, a single layer graphene sheet is stacked on various substrates/nano-structures in a controlled manner for fabricating e.g. a suspended graphene device, and single-bilayer hybrid junction. The Raman and electrical transport results of the artificially twisted bilayer indicates the decoupling of the two graphene sheets. The graphene based electromechanical devices will be presented in the second part of the presentation. Carbon nanotube based nanorelay and A new concept of non-volatile memory based on the carbon nanotube field effect transistor together with microelectromechanical switch will be briefly introduced at first. Recent progress on the graphene based nano structures of our group will be presented. The array of graphene resonators was fabricated and their mechanical resonance properties are discussed. A novel device structures using carbon nanotube field effect transistor combined with suspended graphene gate will be introduced in the end of this presentation.

• 반도체디스플레이기술학회지
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• 제19권3호
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• pp.82-87
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• 2020

The comprehensive and physics-based compact noise models for advanced CMOS devices were presented. The models incorporate important physical effects in nanoscale MOSFETs, such as the low frequency correlation effect between the drain and the gate, the trap-related phenomena, and QM (quantum mechanical) effects in the inversion layer. The drain current noise model was improved by including the tunneling assisted-thermally activated process, the realistic trap distribution, the parasitic resistance, and mobility degradation. The expression of correlation coefficient was analytically described, enabling the overall noise performance to be evaluated. With the consideration of QM effects, the comprehensive low frequency noise performance was simulated over the entire bias range.