• Proceedings of the IEEK Conference
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• 2003.07d
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• pp.1375-1378
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• 2003

다중 프로세서 내장 SoC의 동작 검증에는 많은 연산과 시간을 필요로 한다. 본 논문에서는 듀얼 프로세서 내장 SoC AISC의 검증을 위해 가상 명령어 세트를 기반으로 한 프로그램 소프트웨어 모델(PSM)과 버스 트랜잭션을 발생시키는 프로세서 마크로 엔진 모델(PEM)을 사용한 검증 방법을 제시한다. 제시된 방법은 추상화된 가상 마크로 엔진 명령 세트를 사용함으로써, 적은 컴퓨팅 리소스로 다중프로세서 내장 SoC의 검증을 보다 빠르게 수행할 수 있다.

• Journal of Advanced Marine Engineering and Technology
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• v.25 no.2
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• pp.338-344
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• 2001

According to the MARPOL 73/78 of Convention, all ships should have oil filtering equipment and 15 ppm bilge which satisfy Requirements of MARPOL 73/78. This study is concerned with designing and manufacturing a prototype Oil content Meter(OCM) used in machinery area of ship. The prototype OCM is composed of two parts which are oil content sensing module and data processing unit. The oil content sensing module consists of infra-red light source, photo-diode light receivers, and a glass tube for bilge water sample. The data processing unit has a micro-processor as hard core and peripheral devices. The experimental results of prototype OCM and analysis of collected data reveal linear property between transmitted light and scattered light as long as the bilge water has low level content of oil. And this linear property leads to a oil content detecting method which is programmed and loaded into the data processing unit. The performance of the prototype OCM is compared with that of the commercial OCM in the market.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.5 no.6
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• pp.1078-1082
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• 2001

This is an example of ABSTRACT format. We made a HTTP server using 8 bit microprocessor It was TMP84c015 which applied a z80 core and RTL8019AS was installed for an ethernet physical layer. Assembly language was used to optimized a performance of the MPU, to overcome an restriction of memory sire and to maximize the throughput of packet using TCP, UDP, IP, ICMP, ARP protocol. We used LabVIEW to verify the each protocol on the client side.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.63 no.3
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• pp.206-211
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• 2014

In this Paper, We proposed the HLS(Http Live Streaming) transmitter which is operated easily and cheap in all networks and client environments compared to the exist video live streaming transmitter. We analyzed the HLS protocol and then implemented for making the HLS transmitter cheaper and portable. After designing the HLS transmitter hardware using the RISC processor of Arm11 core, we ported the Linux Operating System and implemented the HLS protocol using the open source FFmpeg and Segmenter. For the performance evaluation of the developed HLS transmitter, we made the testing environment which is including the notebook, iPhone, and aroid Phone. In this testing environment, we analysed the received video data at the client displayer. As a results of the performance evaluation, we could certify that the proposed HLS transmitter has a higher performance than the Apple company's HLS.

• Proceedings of the Korean Information Science Society Conference
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• 2008.06b
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• pp.384-387
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• 2008

PDA와 같은 이동단말에서 화려한 3D 그래픽을 보여주는 것은 그래픽 시스템 리소스의 제약이 있다. Mobile 3D 엔진은 모델의 움직임을 계산하여 동적으로 3D 그래픽을 만들어 내기 때문에 그래픽 시스템 뿐만 아니라, 충분한 성능의 프로세서와 여유의 메모리까지 지원되어야 한다. 본 논문에서는 Mobile 3D 엔진의 제약 사항과 그 해결 방법을 제시하였다. ARM9 Core를 기반으로 3D 가속 기능을 가진 VRender3D에 실제로 OpenGL/ES를 기반으로 하는 Mobile 3D 엔진을 포팅 (porting) 하고, 그 성능을 동적인 3D 영상으로 평가하였다.

• The Journal of the Korea Contents Association
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• v.13 no.6
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• pp.48-54
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• 2013

In these days, the state-of-art technologies employ the heterogeneous parallelization of CPU and GPU for fluid simulations in the field of computer graphics. In this paper, we present a novel CPU-GPU parallel algorithm that solves projection step of fluid simulation more efficiently than existing sequential CPU-GPU processing. Fluid simulation that requires high computational resources can be carried out efficiently by the proposed method.

• Journal of Computing Science and Engineering
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• v.6 no.4
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• pp.267-278
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• 2012

The state-of-the-art techniques in multicore timing analysis are limited to analyze multicores with shared instruction caches only. This paper proposes a uniform framework to analyze the worst-case performance for both shared instruction caches and data caches in a multicore platform. Our approach is based on a new concept called address flow graph, which can be used to model both instruction and data accesses for timing analysis. Our experiments, as a proof-of-concept study, indicate that the proposed approach can accurately compute the worst-case performance for real-time threads running on a dual-core processor with a shared L2 cache (either to store instructions or data).

• Proceedings of the Korea Multimedia Society Conference
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• 2012.05a
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• pp.43-45
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• 2012

This paper is based on embedding the biometrics techniques on GPU for better computational efficiency and fast matching process using the parallel nature of the GPU processors to compare thousands of images for fingerprint recognition in a fraction of a second. In this paper we worked on GPU (INVIDIA GeForce GTX 260 with compute capability 1.3 and dual core-2-dou processor) for fingerprint matching and found that the efficiency is better than the results with related work already done on CMOS, CPU, ARM9, MATLAB Neural Networks etc which shows the better performance of our system in terms of computational time. The features matching process proposed for fingerprint recognition and the verification procedure is done on 5,000 images which are available online in the databases FVC2000, 2002, 2004 [1].

• Journal of the Korea Institute of Military Science and Technology
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• v.12 no.3
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• pp.388-395
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• 2009

Surveillance Radar System for naval vessels is a primary core sensor for command and fire control, and provides CFCS(Command and Fire Control System) information for 3-D surveillance and fire control. It's composed of Antenna, Transmitter/Receiver, Signal Processor, and Air drier, which are installed on and under deck. They should be designed and produced in order to endure at any operating circumstances. This paper analyzes load of a driving part for driving the antenna considering factors under external operating circumstances, and proposes a condition of load for maintaining fixed RPM through analyzing internal load of the driving part, and how to reduce the load to meet the condition. This paper is verified through experimental studies.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.1119-1120
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• 2008

The efficiently power management is an important requirement traditionally in the mobile communication system which uses battery as their power source. Especially, it has been emphasized in the most recent devices, which has to provide high performance and various functions with an extended operating time. In this article, the adaptive power management technique for the core processor unit in embedded systems used widely for the mobile system thanks to its advantage on power consumption and physical size, is proposed.