• Title/Summary/Keyword: Primitive-모듈

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Design of High-Speed Parallel Multiplier with All Coefficients 1's of Primitive Polynomial over Finite Fields GF(2m) (유한체 GF(2m)상의 기약다항식의 모든 계수가 1을 갖는 고속 병렬 승산기의 설계)

  • Seong, Hyeon-Kyeong
    • Journal of the Korea Society of Computer and Information
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    • v.18 no.2
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    • pp.9-17
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    • 2013
  • In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

A Design of a Network Module supporting Primitive Messaging Operations for MOM (MOM의 Primitive Messaging Operation을 지원하는 네트워크 모듈 설계)

  • Kang, Tae-Gun;Sohn, Kang-Min;Ham, Ho-Sang
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.11a
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    • pp.115-118
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    • 2003
  • 최근 MOM 기술은 비즈니스 로직을 수행하는 애플리케이션 서버의 필수적인 구성요소로서 자리잡고 있으며, 보통 수백에서 수천의 클라이언트 요청을 처리할 수 있는 능력을 제공한다. MOM 은 이러한 대용량의 클라이언트 요청을 효과적으로 처리하기 위해서 효율적이고 확장성있는(스케일러블) 네트워크 모듈이 필요하며, 다양한 네트워크 프로토콜을 지원해야 한다. MOM이 기본적으로 지원하는 메시징 기능은 PTP(Point-To-Point)와 publish/subscribe 메시징 도메인으로 나뉘는데 이 논문에서는 두 가지 메시징 도메인과 그룹통신 메시징 서비스 기능을 동시에 지원하는 MoIM-Message 시스템의 하부 통신 모듈의 설계에 대해 기술한다. PTP와 publish/subscribe 메시징을 지원하기 위해 세가지 프리미티브 메시징 오퍼레이션인 "synchronous send", "synchronous receive", "asynchronous receive"를 정의하였으며 하부 통신 모듈 역할을 하는 메시지 트랜스포트 관리 계층내의 트랜스포트 관리자 내에 구현되었다. 트랜스포트 관리자는 다양한 트랜스포트 프로토콜을 적용할 수 있도록 하기 위해 트랜스포트 어댑터로 설계되었으며, 대량의 통신 요청을 효과적으로 처리하기 위해 "polling with multiple service thread model" 기법을 적용하여 구현되었다. 또한, 모바일 클라이언트 환경을 지원하기 위해 클라이언트 측 통신 모듈을 IPaq PDA 상에 포팅하였다. 본 논문에서 제안하는 세 가지 프리미티브 메시징 오퍼레이션을 제공하는 통신 모듈은 MOM이 기본적으로 지원해야 할 메시징 도메인과 대용량의 클라이언트 요청을 효율적으로 처리할 수 있는 구조를 가진다.es}8$ 모드를 모두 사용한 경우와 $8{\times}8$ 단일모드를 사용한 경우보다 계산 시간이 감소하였음을 확인하였다.행중인 MoIM-Messge서버의 네트워크 모듈로 다중 쓰레드 소켓폴링 모델을 적용하였다.n rate compared with conventional face recognition algorithms. 아니라 실내에서도 발생하고 있었다. 정량한 8개 화합물 각각과 총 휘발성 유기화합물의 스피어만 상관계수는 벤젠을 제외하고는 모두 유의하였다. 이중 톨루엔과 크실렌은 총 휘발성 유기화합물과 좋은 상관성 (톨루엔 0.76, 크실렌, 0.87)을 나타내었다. 이 연구는 톨루엔과 크실렌이 총 휘발성 유기화합물의 좋은 지표를 사용될 있고, 톨루엔, 에틸벤젠, 크실렌 등 많은 휘발성 유기화합물의 발생원은 실외뿐 아니라 실내에도 있음을 나타내고 있다.>10)의 $[^{18}F]F_2$를 얻었다. 결론: $^{18}O(p,n)^{18}F$ 핵반응을 이용하여 친전자성 방사성동위원소 $[^{18}F]F_2$를 생산하였다. 표적 챔버는 알루미늄으로 제작하였으며 본 연구에서 연구된 $[^{18}F]F_2$가스는 친핵성 치환반응으로 방사성동위원소를 도입하기 어려운 다양한 방사성의 약품개발에 유용하게 이용될 수 있을 것이다.었으나 움직임 보정 후 영상을 이용하여 비교한 경우, 결합능 변화가 선조체 영역에서 국한되어 나타나며 그 유의성이 움직임 보정 전에 비하여 낮음을 알 수 있었다. 결론: 뇌활성화 과제 수행시에 동반되는 피험자의 머리 움직임에 의하여 도파민 유리가 과대평가되었으며 이는 이 연구에서 제안한 영상정합을 이용한 움직임 보정기법에

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Design of Reed Solomon Encoder(255,223) for KSLV-I Onboard Video Transmission (KSLV-I 탑재영상전송용 리드솔로몬 인코더(255,223) 설계)

  • Lee, Sang-Rae;Lee, Jae-Deuk
    • Aerospace Engineering and Technology
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    • v.6 no.2
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    • pp.157-163
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    • 2007
  • The purpose of this study is to design and simulate Reed Solomon encoder(255,223) in PCM/FM communication system in order to transmit the KSLV-I onboard video data. Especially in the compressed video data transmission applications, the communication system is required to have a very low BER performance because of interframe or interframe compression techniques. We have used the primitive polynomial of CCSDS standard and calculated the various coefficients and then the encoder have been simulated as a part of RF interface FPGA hardware in a video compression unit.

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Design of the Efficient Multiplier based on Dual Basis (듀얼기저에 기초한 효율적인 곱셈기 설계)

  • Park, Chun-Myoung
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.6
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    • pp.117-123
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    • 2014
  • This paper proposes the constructing method of effective multiplier using basis transformation. Th proposed multiplier is composed of the standard-dual basis transformation circuit module to change one input into dual basis the operation module to generate from bm to bm+k by the m degree irreducible polynomial, and the polynomial multiplicative module to consist of $m^2$ AND and m(m-1) EX-OR gates. Also, the dual-standard basis transformation circuit module to change the output part to be shown as a dual basis into standard basis is composed. The operation modules to need in each operational part are defined.

Construction of High-Speed Parallel Multiplier on Finite Fields GF(3m) (유한체 GF(3m)상의 고속 병렬 승산기의 구성)

  • Choi, Yong-Seok;Park, Seung-Yong;Seong, Hyeon-Kyeong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.3
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    • pp.510-520
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    • 2011
  • In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and compose the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells that have a mod(3) addition gate and a mod(3) multiplication gate. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

A Construction of Cellular Array Multiplier Over GF($2^m$) (GF($2^m$)상의 셀배열 승산기의 구성)

  • Seong, Hyeon-Kyeong;Kim, Heung-Soo
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.26 no.4
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    • pp.81-87
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    • 1989
  • A cellular array multiplier for performing the multiplication of two elements in the finite field GF($2^m$) is presented in this paper. This multiplier is consisted of three operation part ; the multiplicative operation part, the modular operation part, and the primitive irreducible polynomial operation part. The multiplicative operation part and the modular operation part are composed by the basic cellular arrays designed AND gate and XOR gate. The primitive iirreducible operation part is constructed by XOR gates, D flip-flop circuits and a inverter. The multiplier presented here, is simple and regular for the wire routing and possesses the properties of concurrency and modularity. Also, it is expansible for the multiplication of two elements in the finite field increasing the degree m and suitable for VLSI implementation.

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Design of High-Speed Parallel Multiplier on Finite Fields GF(3m) (유한체 GF(3m)상의 고속 병렬 곱셈기의 설계)

  • Seong, Hyeon-Kyeong
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.2
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    • pp.1-10
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    • 2015
  • In this paper, we propose a new multiplication algorithm for primitive polynomial with all 1 of coefficient in case that m is odd and even on finite fields $GF(3^m)$, and design the multiplier with parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $(m+1)^2$ same basic cells. Since the basic cells have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $T_A+T_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

Dialogue State Tracking using Circumstance Information to Improve the Accuracy of Task-Oriented Dialogue System in Metaverse (메타버스에서 목적 지향 대화 시스템의 정확도 향상을 위한 상황 정보 활용 대화 상태 추적 기술)

  • Kim, Seungyeon;Bang, Junseong
    • Journal of Broadcast Engineering
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    • v.27 no.5
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    • pp.685-693
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    • 2022
  • The Metaverse is getting popular due to the demands for digital transformation and non-contact communication platforms. A conversation system which facilitates communication is not widely applied yet in Metaverse. In this work, we present a method that revises primitive dialogue state using circumstance information from Metaverse. The presented model that leverages both dialogue and circumstance information consists of a dialogue state tracking module and a circumstance state tracking module. In the model, a dialogue state is updated with an algorithm which compares a dialogue state and a circumstance state. As a conversation that reaffirms user intent is added, a wrong dialogue state can be revised and the accuracy of a conversation system can be improved.

Developing a Module to Store 3DF-GML Instance Documents in a Database (3DF-GML 인스턴스 문서의 데이터베이스 저장을 위한 모듈 개발)

  • Lee, Kang-Jae;Jang, Gun-Up;Lee, Ji-Yeong
    • Spatial Information Research
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    • v.19 no.6
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    • pp.87-100
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    • 2011
  • Recently, a variety of GML application schemas have been designed in many fields. GML application schemas are specific to the application domain of interest and specify object types using primitive object types defined in the GML standard. GML instance documents are created based on such GML application schemas. The GML instance documents generally require large volumes to represent huge amounts of geographic objects. Thus, it is essential to store such GML instance documents in relational database for efficient management and use. Relational database is relatively convenient to use and is widely applied in various fields. Furthermore, it is fundamentally more efficient than file structure to handle large datasets. Many researches on storing GML documents have been carried out so far. However, there are few studies on storage of GML instance documents. Therefore, in this study, we developed the storage module to store the GML instance documents in relational database.

A Study on Implementation of Multiple-Valued Arithmetic Processor using Current Mode CMOS (전류모드 CMOS에 의한 다치 연산기 구현에 관한 연구)

  • Seong, Hyeon-Kyeong;Yoon, Kwang-Sub
    • Journal of the Korean Institute of Telematics and Electronics C
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    • v.36C no.8
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    • pp.35-45
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    • 1999
  • In this paper, the addition and the multiplicative algorithm of two polynomials over finite field $GF(p^m)$ are presented. The 4-valued arithmetic processor of the serial input-parallel output modular structure on $GF(4^3)$ to be performed the presented algorithm is implemented by current mode CMOS. This 4-valued arithmetic processor using current mode CMOS is implemented one addition/multiplication selection circuit and three operation circuits; mod(4) multiplicative operation circuit, MOD operation circuit made by two mod(4) addition operation circuits, and primitive irreducible polynomial operation circuit to be performing same operation as mod(4) multiplicative operation circuit. These operation circuits are simulated under $2{\mu}m$ CMOS standard technology, $15{\mu}A$ unit current, and 3.3V VDD voltage using PSpice. The simulation results have shown the satisfying current characteristics. The presented 4-valued arithmetic processor using current mode CMOS is simple and regular for wire routing and possesses the property of modularity. Also, it is expansible for the addition and the multiplication of two polynomials on finite field increasing the degree m and suitable for VLSI implementation.

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