• Journal of Korea Multimedia Society
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• v.3 no.2
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• pp.101-111
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• 2000

Resource managing is very difficult because the multimedia data compressed by a VBR shows a bit rate change within high range, Therefore, the VOD server should use the prefetch method in order to improve system utilization, such as prefetching data in the overload period by a meta table that is the reference pattern of MPEG data which is analyzed off line. This prefetch method will not result in a failure to display at overload, however, this method can not keep a minimum loading time and low costs, because the prefetched section is being maximizes. In this paper, we suggest another method that the system utilization can be improved using the fixed prefetched section to keep loading time and costs under a constant range at overload. But this technique will result in a failure to display, due to fixed prefetched section. Rut, in this paper we suggest a drop module that drops only the B frame in the GOP, consistently distributes a lower drop in media quality for the user.

• The KIPS Transactions:PartA
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• v.11A no.3
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• pp.163-172
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• 2004

Multimedia applications tend to access their data as a streaming pattern with regular intervals. This characteristic can be utilized in prefetching the multimedia data into cache memory so as to reduce their execution speeds. The reference-prediction prefetch algorithm predicts the memory address that seems to be used in the next time based on the previous history of memory references stored in the prediction reference table. This paper proposes a strategy to manipulate the reference prediction table which contains all of the data reference instructions to scalar and streaming data. We have recognized that the scalar reference instructions do not contribute to the data prefetching algorithm. Therefore, when replacing an element in the reference prediction table, the proposed algorithm preferentially selects the scalar reference instruction before the stream reference instruction. It makes the stream reference instruction to stay for a long time compared to the FIFO replacement policy, and eventually improves the performance of data prefetching.

• Journal of KIISE:Computer Systems and Theory
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• v.31 no.11
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• pp.658-672
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• 2004

Multimedia applications are required to process the huge amount of data at high speed in real time. The memory reference instructions such as loads and stores are the main factor which limits the high speed execution of processor. To enhance the memory reference speed, cache prefetch schemes are used so as to reduce the cache miss ratio and the total execution time by previously fetching data into cache that is expected to be referenced in the future. In this study, we present an advanced data cache prefetching scheme that improves the conventional RPT (reference prediction table) based scheme. We considers the cache line size in calculation of the address stride referenced by the same instruction, and enhances the prefetching algorithm so that the effect of prefetching could be maintained even if an irregular address stride is inserted into the series of uniform strides. According to experiment results on multimedia benchmark programs, the cache miss ratio has been improved 29% in average compared to the conventional RPT scheme while the bus usage has increased relatively small amount (0.03%).

• Journal of the Institute of Convergence Signal Processing
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• v.3 no.1
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• pp.21-26
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• 2002

Video stream invoke a variety of traffic with the structure of compression algorithm and image complexity. Thus, it is difficult to allocate the resource on the both sides of sender and receiver, and playout on the Internet such as a packet switched network. Thus, in this paper we proposed video stream smoothing using multistream for the effective transmission of video stream. This method specifies the type of LDU(logical data unit) according to the type of original stream, and then makes a large number of streams as a fixed size, and transfers them. So, the proposed method can reduce the buffering time which occurs during the process of the smoothing and prefetch be robust to the jitter on network, as well. Consequently, it has the effective transmission characteristics of fully utilizing the clients bandwidth.

• Proceedings of the Korea Information Processing Society Conference
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• 2020.11a
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• pp.20-23
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• 2020

This research is to design an effective prefetching method required for DRAM-PCM hybrid main memory systems especially used for big data applications and massive-scale computing environment. Conventional prefetchers perform well with regular memory access patterns. However, workloads such as graph processing show extremely irregular memory access characteristics and thus could not be prefetched accurately. Therefore, this research proposes an efficient dynamical prefetching algorithm based on the regression method. We have designed an intelligent prefetch engine that can identify the characteristics of the memory access sequences. It can perform regular, linear regression or polynomial regression predictive analysis based on the memory access sequences' characteristics, and dynamically determine the number of pages required for prefetching. Besides, we also present a DRAM-PCM hybrid memory structure, which can reduce the energy cost and solve the conventional DRAM memory system's thermal problem. Experiment result shows that the performance has increased by 40%, compared with the conventional DRAM memory structure.

• The KIPS Transactions:PartA
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• v.11A no.7 s.91
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• pp.547-554
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• 2004

To play back CM (Continuous Media) in online mode, the multimedia system Is required to have a real-time disk scheduling scheme that can efficiently fulfill the strict temporal constraints of serviced CM streams to prevent hiccups. In general, such disk scheduling is performed based on the concept of periodic prefetching since a CM stream has a rather long Playback time. In this paper, we also propose a periodic prefetching scheme that runs by using real-time disk channels, called on-time delivery channels. Since the channels are generated from the bulk-SCAN algorithm and they can be allocated in a very flexible manner based on the EDF (earliest-deadline-first) algorithm, the proposed scheme provides a better Performance in terms of I/O throughput and the average response time, as well as hiccup-free playback of concurrent CM streams. To show that the proposed scheme outperforms other methods, we give some simulation results.

• Journal of Internet Computing and Services
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• v.4 no.6
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• pp.75-86
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• 2003

In main-memory resident index structures, secondary cache misses considerably have an effect on the performance of index structures. Recently, several main-memory resident index structures that consider cache have been proposed to reduce the impact of secondary cache misses. However they still suffer from full secondary cache misses whenever visiting each level of a index tree, In this paper, we propose a new index structure that eliminates cache misses even when visiting each level of index tree. The proposed index structure prefetches the grandchildren of a current node. The basic structure of the proposed index structure is from CSB+-tree that uses the concepts of the node group to increase fan-out. However the insert algorithm of the proposed index structure reduces the cost of a split significantly, Also, we show the superiority of our algorithm through various performance evaluation.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.5
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• pp.285-291
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• 2010

Flash memory has many good features such as small size, shock-resistance, and low power consumption, but the cost of flash memory is still high to substitute for hard disk entirely. Recently, some mobile devices, such as laptops, attempt to use both flash memory and hard disk together for taking advantages of merits of them. However, existing OSs (Operating Systems) are not optimized to use the heterogeneous storage media. This paper presents a new buffer cache management scheme. First, we allocate buffer cache space according to access patterns of block references and the characteristics of storage media. Second, we prefetch data blocks selectively according to the location of them and access patterns of them. Third, we moves destaged data from buffer cache to hard disk or flash memory considering the access patterns of block references. Trace-driven simulation shows that the proposed schemes enhance the buffer cache hit ratio by up to 29.9% and reduce the total I/O elapsed time by up to 49.5%.