통합 검색 | Korea Science

이찬홍;이후상
- 한국정밀공학회지
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- 제15권12호
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- pp.188-193
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- 1998
This paper describes static and dynamic weak point analysis of spindle systems to eliminate high concentrated bending point on spindle and improve total stiffness of spindle systems. The weak point analysis is based on the evaluation of bending curves of spindles. For static weak point analysis the bending curve is derived from static deflection curve and for dynamic weak point analysis it is derived from the mode shape curves in consideration of the transfer function at exciting point. The validity of the weak point search methodology is verified by comparison of the static deflection, the natural frequency and the dynamic compliance between the original and the improved spindle.
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범진환;김학렬
- 한국정밀공학회지
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- 제12권6호
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- pp.80-86
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- 1995
A method of eliminating the branch problem in driving crank center point plane for 3 position synthesis of 4 bar mechanism is introduced. By studying various transformation characteristics from the circle point plane into the center poi t plane, the curves in the center point plane transformed from the filemon line in circle point plane are analytically obtained, which will seperate the whole center point plane into many sub-areas for the selec- tion of the center point of the driving crank. And a simple method to identify which of the sub-areas will cause the branch problem is also presented. The method will allow the selection of the center point of driving crank without the branch problem.
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이주훈;정태상
- 대한전기학회:학술대회논문집
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- 대한전기학회 1999년도 추계학술대회 논문집 학회본부 B
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- pp.778-780
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- 1999
Arithmetic unit speed depends strongly on the algorithms employed to realize the basic arithmetic operations.(add, subtract multiply, and divide) and on the logic design. Recent advances in VLSI have increased the feasibility of hardware implementation of floating point arithmetic units and microprocessors require a powerful floating-point processing unit as a standard option. This paper describes the design of floating-point multiplier for IEEE 754-1985 Single-Precision operation. Booth encoding algorithm method to reduce partial products and a Wallace tree of 4-2 CSA is adopted in fraction multiplication part to generate the $32{\times}32$ single-precision product. New scheme of rounding and sticky-bit generation is adopted to reduce area and timing. Also there is a true sign generator in this design. This multiplier have been implemented in a ALTERA FLEX EPF10K70RC240-4.
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