• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.7
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• pp.440-448
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• 2014

A $4{\times}10$ Gb/s Transimpedance Amplifier (TIA) array is implemented in $0.13{\mu}m$ CMOS process technology, which will be used in the receiver of TWDM-PON system. A technology for bandwidth enhancement of a given $4{\times}10$ Gb/s TIA presented under inductor peaking technology and a single 1.2V power supply based low voltage design technology. It achieves 3 dB bandwidth of 7 GHz in the presence of a 0.5 pF photodiode capacitance. The trans-resistance gain is $50dB{\Omega}$, while 48 mW/ 1channel from a 1.2 V supply. The input sensitivity of the TIA is -27 dBm. The chip size is $1.9mm{\times}2.2mm$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.353-353
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• 2008

Carbon nanotubes (CNTs) are attractive for field emitter because of their outstanding electrical, mechanical, and chemical properties. Several applications using CNTs as field emitters have been demonstrated such as field emission display (FED), backlight unit (BLU), and X-ray source. In this study, we fabricated a CNT cathode using transparent ultra-thin CNT film. First, CNT aqueous solution was prepared by ultrasonically dispersing purified single-walled carbon nanotubes (SWCNTs) in deionized water with sodium dodecyl sulfate (SDS). To obtain the CNT film, the CNT solution in a milliliter or even several tens of micro-litters was deposited onto a porous alumina membrane through vacuum filtration process. Thereafter, the alumina membrane was solvated by the 3 M NaOH solution and the floating CNT film was easily transferred to an indium-tin-oxide (ITO) glass substrate of $0.5\times0.5cm^2$ with a film mask. The transmittance of as-prepared ultra-thin CNT films measured by UV-Vis spectrophotometer was 68~97%, depending on the amount of CNTs dispersed in an aqueous solution. Roller activation, which is a essential process to improve the field emission characteristics of CNT films, increased the UV-Vis transmittance up to 93~98%. This study presents SEM morphology of CNT emitters and their field emission properties according to the concentration of CNTs in an aqueous solutions. Since the ultra-thin CNT emitters prepared from the solutions show a high peak current density of field emission comparable to that of the paste-base CNT emitters and do not contain outgassing sources such as organic binders, they are considered to be very promising for small-size-but-high-end applications including X-ray sources and microwave power amplifiers.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.7
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• pp.23-29
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• 2011

A dB-linearity improved variable gain amplifier (VGA) for GPS receiver is presented. The Proposed dB-linear current generator has improved dB-linearity error of ${\pm}0.15$dB. The VGA for GPS is designed using proposed dB-linear current generator and composed of 3 stage amplifiers. The IF frequency is assumed as 4MHz and the linearity requirement of the VGA for GPS receiver is defined as 24dBm of IIP3 using cascaded IIP3 equation and the VGA satisfies 24dBm when minimum gain mode. The DC-offset voltage is eliminated using DC-offset cancelation loop. The gain range is from -8dB to 52dB and the dB-linearity error satisfies ${\pm}0.2$dB. The 3-dB frequency has range of 35MHz~106MHz for the gain range. The VGA is designed using 0.18${\mu}m$ CMOS process. The power consumption is 3mW with 1.8V supply voltage.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.7
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• pp.627-635
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• 2015

We propose a dual-layer differential equal-gain codebook design methodology for LTE-Advanced(LTE-A), IEEE802.ac, and radar system having multiple transmit and receive antennas, and make computer simulations to evaluate its link-level performaces. M-ary phase shift keying constellation is used as its codeword elements to utilize low-cost power amplifiers at mobile stations. Especially, the proposed codebook can meet radar systems requirement for the high-powered equal-gain transmission property. Due to the temporal correlation of the adjacent channel, the proposed differential codebook can quantize only the differential information of the channel instead of the whole channel subspace, which virtually increase the codebook size to realize more accurate quantization of the channel. The proposed codebook has the same properties of LTE codebook that is, constant modulus, complexity reduction, and nested property. Computer simulations show that the proposed codebook performs better than the conventional 8-ary codebooks with the same amount of feedback information.

• Journal of Biomedical Engineering Research
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• v.20 no.2
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• pp.205-212
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• 1999

When we want to observe and record a patient's EEG in an operating room, the operation of electrosurgical unit(ESU) causes undesirable artifacts with high frequency and high voltage. These artifacts make the amplifiers of the conventional EEG system saturated and prevent the system from measuring the EEG signal. This paper describes a high-performance bipolar EEG amplifier for a CSA (compressed spectral array ) system with reduced ESU artifacts. The designed EEG amplifier uses a balanced filter to reduce the ESU artifacts, and isolates the power supply and the signal source of the preamplifier from the ground to cut off the current from the ESU to the amplifier ground. To cancel the common mode noise in high frequency, a high CMRR(common mode rejection ratio) diffferential amplifier is used. Since the developed bipolar EEG amplifier shows high gain, low noise, high CMRR, high input impedance, and low thermal drift, it is possible to observe and record more clean EEG signals in spite of ESU operation. Therefore the amplifier may be applicable to a high-fidelity CSA system.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.2
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• pp.134-139
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• 2004

A clock recovery circuit for a 40 Gb/s optical receiver has been designed and implemented. The clock recovery circuit consists of pre-amplifiers, a nonlinear circuit with diodes, a bandpass filter and a clock amplifier. Before implementing the 40 Gb/s clock recovery circuit, a 10 Gb/s clock recovery circuit has been successfully implemented and tested. With the 40 Gb/s clock recovery circuit, when a 40 Gb/s signal of -10 dBm was applied to the input of the circuit, the 40 GHz clock was recovered with the -20 dBm output power after passing through the nonlinear circuit. The output signal from the nonlinear circuit passes through a narrow-band filter, and then amplified. The implemented clock recovery circuit is planned to be used for the input of a phase locked loop to further stabilize the recovered clock signal and to reduce the clock jitter.

• Korean Journal of Optics and Photonics
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• v.14 no.2
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• pp.175-183
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• 2003

We obtain a solution of optical parametric amplification using self-phase modulation within the Kerr media in a nonlinear interferometer with two arms. We show that it is equivalent to the solution driven by four-wave mixing and that the solution of parametric amplification is suitable to generate a parametric gain. We obtain a derivative of power gain with respect to the propagation distance and show that gain-saturation can occur as the beam propagates along the nonlinear arms. We also show a bandwidth characteristic of the parametric amplification driven by nondegenerate four-wave mixing. Numerical examples are given to illustrate that the solution of the parametric amplification can be applied to design and analysis of all-optical devices such as all-optical amplifiers.

• The KIPS Transactions:PartA
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• v.12A no.6 s.96
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• pp.531-538
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• 2005

In the high performance Analog Information Processing Systems(AIPS), gain boosting or additional gain stage is required when the gain is not sufficient with one stage amplification. This work shows that high gain is neatly obtained by enhancing the gain using the negative resistance element. Compared to the conventional techniques, the proposed scheme enjoys full output swing, small circuit area and power consumption, and the applications to various configurations of amplifiers. The negative resistance element is placed between the differential output nodes when used in the Op-Amp. The HSPICE simulation indicates that enhancement of more than 40 dB is readily obtained in this simple configuration when the negative resistance element is implemented in the form of cross-coupled CMOS inverters.

• Korean Journal of Optics and Photonics
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• v.25 no.2
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• pp.61-66
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• 2014

We report the characterization of a wavelength-swept laser (WSL) using a polygon-based wavelength scanning filter and two semiconductor optical amplifiers (SOAs). The output intensity and scanning bandwidth of the WSL depend on the position of the two SOAs in the laser cavity and the coupling ratio of the output fiber coupler. The outputs of the WSL are characterized for coupling ratios of 10%, 30%, 50%, 70%, and 90% for the output fiber coupler. In the setup in which the output fiber coupler is located between the two SOAs, high output power and wide scanning bandwidth can be achieved with an optimized configuration. Using the optimized configuration of the WSL, the intensity increases with the coupling ratio. These results can be used to construct an optimized WSL using the polygon-based wavelength scanning filter.

• Journal of Advanced Navigation Technology
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• v.22 no.2
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• pp.154-162
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• 2018

The multiplier circuit is necessary to estimate degradation status of electronic cards in nuclear power plant, but its accuracy is not easy in processing those functions to multiply two input signals. What is important in multiplier circuit is that the multiplication result must be accurate and its linearity must be perfect. We developed and proposed excellent linearity multiplier circuit using operational amplifiers and transistor characteristics, and then proved its validity in this paper. We have made efforts to eliminate nonlinearity components of semiconductors with this circuit in order to ensure excellent linearity of developed multiplier circuit. We conducted multiplication operations through simulation, applying adequate values to each component in order to verify the circuit composed of that method. We showed step-by-step output signals, and then compared the logical analyses and measuring results as simulation results. We confirmed that this method is superior to existing multiplication or linearity.