• 제목/요약/키워드: Power Mode

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디스플레이용 스위칭모드 전원장치의 단락 고장분석 검출기법 (Techniques to Diagnose Short-Circuit Faults in the Switching Mode Power Supply for Display)

  • 이재원;전태원
    • 전기학회논문지
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    • 제65권7호
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    • pp.1186-1192
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    • 2016
  • This paper proposes techniques to diagnose short-circuit faults of both the diodes and power FET in switching mode power supply (SMPS) by using a simple analog tester. The diodes in full-bridge rectifier, power FET, switching transformer, and some sensors are modelled with resistor. The total resistance value measured at the input terminal of a SMPS is analyzed when the short-circuit faults of diodes in a full bridge rectifier or power FET are occurred. The short-circuit faults of one or two diodes in a full bridge rectifier, power FET, and both the diodes in a full bridge rectifier and power FET can be detected by a range of total resistance, which is measured by the analog tester. Through experiments, the theoretical analysis for total resistance under short-circuit faults can be verified.

보조전원장치의 단락부하 차단기 개방을 위한 제어방법 (Control Method for Cut-out of Shorted Load in the Auxiliary Power Supply)

  • 황광철;조국춘;최종묵
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 1998년도 추계학술대회 논문집
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    • pp.249-254
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    • 1998
  • This paper describes the control methods to cut out the NFB(No Fuse Breaker) of shorted load in the auxiliary power supply, Generally, when the short-circuit occurs in the load of the auxiliary power supply, the auxiliary power supply stops the operation according to the protection sequence. Finally, the other auxiliary power supply stops the operation by the same fault, To resolve this problem, we suggest the control method to trip the NFB of shorted load. That is, when the short circuit occurs, the controller changes control mode from voltage mode to current mode without the operation of output contactor(SIVK) in the auxiliary power supply. The auxiliary power supply provides a large current for the short-circuit load. After some time, the NFB of the short-circuit load is cut off and the auxiliary power supply Provides stable voltage for the loads except for the short-circuit load.

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정류와 역변환 모드를 고려한 능동전력필터의 순시 보상전력 흐름도 (Instantaneous Compensating Power Flow Graph of Active Power Filters Considering Rectification / Inversion Modes)

  • 정영국;정찬수;배동관;안재영;김광헌;임영철
    • 전력전자학회:학술대회논문집
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    • 전력전자학회 1999년도 전력전자학술대회 논문집
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    • pp.101-105
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    • 1999
  • The goal of this paper is to present instantaneous compensating power flow of active power filters(APFs) by graphical method that could be practicable to compensate the power in both case of behaving in instantaneous rectifying mode and instantaneous inverting mode. To ensure the validity of the proposed method, computer simulation is achieved. Proposed method can be present more exquisite and physically meaningful power flow than conventional method in instantaneous compensating power flow Graph of APFs.

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입력전압을 감지하지 않는 전류연속/임계동작모드 Active Power Factor Correction Circuit (A Continuous Conduction mode/Critical Conduction Mode Active Power Factor Correction Circuit with Input Voltage Sensor-less Control)

  • 노용성;유창식
    • 전자공학회논문지
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    • 제50권8호
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    • pp.151-161
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    • 2013
  • 본 논문에서는 입력전압을 감지하지 않는 전류연속/임계동작모드 active power factor correction(PFC) circuit을 제안하였다. 기존의 입력전압을 감지하지 않는 PFC circuit의 경우 출력전류가 낮은 경 부하 조건에서 DCM 동작을 수행하고, 이에 따라 PF가 감소하는 문제가 발생한다. 제안한 PFC circuit은 70KHz의 주파수로 CCM 동작을 수행하고, 경 부하 조건에서 최대 200KHz까지 스위칭 주파수가 가변되는 CRM 동작을 수행하도록 하였다. 이를 통해 경 부하 조건에서 PF가 감소하는 문제를 해결하였다. PFC controller IC는 $0.35{\mu}m$ BCDMOS 공정을 이용하여 제작하였으며, 240W급 PFC prototype을 제작하여 실험하였다. 제안한 PFC circuit은 기존의 PFC circcuit 대비 최대 10%의 역률이 향상되었고, IEC 61000-3-2 Class D 규격에 따른 경 부하 조건에서는 최대 4% 역률이 향상되었다.

Two Switches Balanced Buck Converter for Common-Mode Noise Reduction

  • Kanjanasopa, Warong;Prempraneerach, Yothin
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2004년도 ICCAS
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    • pp.493-498
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    • 2004
  • The EMI noise source in a switching mode power supply is dominated by a common mode noise. If we can understand the common mode noise occurring mechanism, it is resulted to find out the method to suppress the EMI noise source in the switching mode power supply. The common mode noise is occurring mostly due to circuit is unbalanced which is caused by the capacitive coupling to frame ground, which passes through a heatsink of the switching devices. This research paper presents a new effective balancing method of buck converter circuit by mean of grounding the parasitic and compensation capacitors in correct proportion which is called that the common mode impedance balance (CMIB). The CMIB can be achieved by source, transmission line and termination balanced, such balancing, the common mode current will be cancelled out in the frame ground. The greatly reduced common mode noise can be confirmed by the experimental results.

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넓은 입력 범위를 갖는 무선 전력 전송용 다중 모드 정류기 설계 (A Design of Wide Input Range Multi-mode Rectifier for Wireless Power Transfer System)

  • 최영수;이강윤
    • 대한전자공학회논문지SD
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    • 제49권4호
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    • pp.34-42
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    • 2012
  • 본 논문에서는 무선전력전송 시스템 수신부의 넓은 입력 범위의 CMOS 다중 모드 정류기를 설계하였다. 다중 모드 정류기의 출력전압을 비교기로 감지하고, 스위치를 컨트롤 하여 정류기 모드를 전환한다. 다중 모드 정류기는 입력 전압의 크기에 따라 자동으로 전파 정류기, 1단 전압 체배기, 2단 전압 체배기로 동작한다. 일반적인 전파 정류기는 10 V에서 20 V까지의 입력 AC 전압에 대해 9 V에서 19 V까지의 출력 DC 전압을 생성할 수 있다. 다중 모드 정류기는 전파 정류기 보다 입력 범위를 5 V 향상시켜서 5 V에서 20 V까지의 입력 AC 전압에 대해 출력 DC 전압은 7.5 V에서 19 V까지 생성되는 것을 보여준다. 다중 모드 정류기의 효율은 전파 정류기 모드에서 94%이다. 제안하는 다중 모드 정류기는 0.35${\mu}m$ BCD 공정으로 설계되었고, 면적은 $2500{\mu}m{\times}1750{\mu}m$ 이다.

압전방식초음파치석제거기의작업조건에따른치과주조용합금의삭제결손부 양상에 관한 고찰 (A morphologic evaluation of defects created by a piezoelectric ultrasonic scaler on casting gold alloy)

  • 김영성;김수환;김원경;이영규
    • Journal of Periodontal and Implant Science
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    • 제39권4호
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    • pp.385-390
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    • 2009
  • Purpose: In this study we evaluated the morphologic aspects of defects created by a piezoelectric ultrasonic scaler with scaler tip on casting gold alloy using scanning electron microscope (SEM) images and defect surface profiles. Methods: 54 blocks of type III casting gold alloy (Firmilay, Jellenko Inc, CA, USA) were scaled by a piezoelectric ultrasonic scaler (P-MAX, Satelec, France) with scaler tip (No. 1 tip) on a sledge device. 2-dimensional profiles of defects on all samples were investigated by a surface profilometer (a-Step 500, KLA-Tencor, CA, USA). The selected working parameters were lateral force (0.5 N, 1.0 N, 2.0 N), mode (P mode, S mode), and power setting (2, 4, 8). SEM images were obtained. Defect surface profiles were made on Microsoft Excel program using data obtained by a surface profilometer. Results: Among P mode samples, there were similarities on defect surface profiles and SEM images regardless of lateral force. The defects created in P mode were narrow and shallow although the depth and the width increased as power setting changed low (2) to high (8). In P mode samples, the defect depth was the greatest when lateral force of 0.5 N was applied. However all the depths were smaller than 1 m. SEM images of Lateral force of 0.5 N, S mode, power setting 2 and 4 were similar to that of P mode, but the other SEM images of S mode showed discernible changes. Defect depth of S mode samples was the greatest when lateral force of 1.0 N was applied. Conclusions: Within the limitations of this study, it can be concoluded that removing capability of piezoelectric scaler with scaler tip becomes maximized as power level becomes higher but the capability is restricted when excessive lateral force is applied on scaler tip.

모바일 기기 신호 인터페이스용 MIPI 디지털 D-PHY의 저전력 설계 (Low Power Design of a MIPI Digital D-PHY for the Mobile Signal Interface)

  • 김유진;김두환;김석만;조경록
    • 한국콘텐츠학회논문지
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    • 제10권12호
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    • pp.10-17
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    • 2010
  • 본 논문에서는 모바일 기기 신호 인터페이스용 MIPI(Mobile industry processor interface)의 D-PHY의 디지털 블록의 저전력 설계를 제안한다. MIPI는 고속 데이터 전송을 위한 HS(high-speed)모드와 주로 제어에 사용되는 LP(low-power)모드의 두 가지 동작 모드를 갖는다. 저전력 소모를 위해 디지털 블록 내부 구성요소를 각 동작에 따라 선택적으로 스위칭 할 수 있는 클럭 게이팅(Clock gating) 기법을 적용했다. 저전력 동작의 설계에 대한 동작을 시뮬레이션을 통해 검증하고 기존의 일반적인 MIPI D-PHY 디지털 블록과 전력소모를 비교했다. HS 모드 데이터 전송동작에 대해서는 저전력 설계를 통하여 전력소모가 송신단(TX: transmitter)과 수신단(RX: receiver) 각각 74%와 31% 감소하여 전체적으로 전력소모가 50%로 줄었고, LP 모드 동작에 대해서도 전력소모가 TX와 RX 각각 79%와 40% 감소하여 전체적으로 51.5% 줄어들었다. 제안된 저전력 MIPI D-PHY 디지털 칩은 $0.13{\mu}m$ CMOS 공정에서 1.2V의 전원을 갖도록 설계 및 제작되었다.

Strategy for the Seamless Mode Transfer of an Inverter in a Master-Slave Control Independent Microgrid

  • Wang, Yi;Jiang, Hanhong;Xing, Pengxiang
    • Journal of Power Electronics
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    • 제18권1호
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    • pp.251-265
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    • 2018
  • To enable a master-slave control independent microgrid system (MSCIMGS) to supply electricity continuously, the microgrid inverter should perform mode transfer between grid-connected and islanding operations. Transient oscillations should be reduced during transfer to effectively conduct a seamless mode transfer. This study uses a typical MSCIMGS as an example and improves the mode transfer strategy in three aspects: (1) adopts a status-tracking algorithm to improve the switching strategy of the outer loop, (2) uses the voltage magnitude and phase pre-synchronization algorithm to reduce transient shock at the time of grid connection, and (3) applies the hybrid-sensitivity $H_{\infty}$ robust controller instead of the current inner loop to improve the robustness of the controller. Simulations and experiments show that the proposed strategy is more practical than the traditional proportional-derivative control mode transfer and effective in reducing voltage and current oscillations during the transfer period.

이산푸리에변환과 시계열데이터의 고속 파라미터 추정 (A Fast Parameter Estimation of Time Series Data Using Discrete Fourier Transform)

  • 심관식;남해곤
    • 대한전기학회논문지:전력기술부문A
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    • 제55권7호
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    • pp.265-272
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    • 2006
  • This paper describes a method of parameter estimation of time series data using discrete Fourier transform(DFT). DFT have been mainly used to precisely and rapidly obtain the frequency of a signal. In a dynamic system, a real part of a mode used to learn damping characteristics is a more important factor than the frequency of the mode. The parameter estimation method of this paper can directly estimate modes and parameters, indicating the characteristics of a dynamic system, on the basis of the Fourier transform of the time series data. Real part of a mode estimates by subtracting a frequency of the Fourier spectrum corresponding to 0.707 of a magnitude of the peak spectrum from a peak frequency, or subtracting a frequency of the power spectrum corresponding to 0.5 of the peak power spectrum from a peak frequency, or comparing the Fourier(power) spectrum ratio. Also, the residue and phase of time signal calculate by simple equation with the real part of the mode and the power spectrum that have been calculated. Accordingly, the proposed algorithm is advantageous in that it can estimate parameters of the system through a single DFT without repeatedly calculating a DFT, thus shortening the time required to estimate the parameters.