• Proceedings of the Materials Research Society of Korea Conference
• /
• 2012.05a
• /
• pp.73-73
• /
• 2012

Modern technology-driven society largely relies on hybrid electric vehicles or electric vehicles for eco-friendly transportation and the use of high technology devices. Lithium rechargeable batteries are the most promising power sources because of its high energy density but still have a challenge. Graphite is the most widely used anode material in the field of lithium rechargeable batteries due to its many advantages such as good cyclic performances, and high charge/discharge efficiency in the initial cycle. However, it has an important safety issue associated with the dendritic lithium growth on the anode surface at high charging current because the conventional graphite approaches almost 0 V vs $Li/Li^+$ at the end of lithium insertion. Therefore, a fundamental solution is to use an electrochemical redox couple with higher equilibrium potentials, which suppresses lithium metal formation on the anode surface. Among the candidates, $Li_4Ti_5O_{12}$ is a very interesting intercalation compound with safe operation, high rate capability, no volume change, and excellent cycleability. But the insulating character of $Li_4Ti_5O_{12}$ has raised concerns about its electrochemical performance. The initial insulating character associated with Ti4+ in $Li_4Ti_5O_{12}$ limits the electronic transfer between particles and to the external circuit, thereby worsening its high rate performance. In order to overcome these weak points, several alternative synthetic methods are highly required. Hence, in this presentation, novel ways using a synergetic strategy based on 1D architecture and surface coating will be introduced to enhance the kinetic property of Ti-based electrode. In addition, first-principle calculation will prove its significance to design Ti-based electrode for the most optimized electrochemical performance.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.19 no.10
• /
• pp.1147-1158
• /
• 2008

In this paper, we designed a phase-looking circuit that locks the 16.8 GHz VTDRO to a 700 MHz SAW oscillator using SPD as a phase detector Direct phase locking with loop filter alone causes the problem of lock time, so VTDRO is phase leered by loop filter with the aid of time varying square wave current generator. The current generator is related to the loop filter and needs the systematic toning. In this paper, a systematic design of the current generator and loop filter is presented. The fabricated PLDRO shows a stabilized frequency of 16.8 GHz, a output power 6.3 dBm, and a phase noise of -101 dBc/Hz at the 100 kHz offset.

• Journal of Aerospace System Engineering
• /
• v.14 no.3
• /
• pp.51-59
• /
• 2020

In the case of cubesat, a PCB-based deployable solar panel advantageous in terms of weight reduction and electrical circuit design is widely used considering the limited weight and volume of satellites. However, because of the low thermal conductivity of PCB, there is a limit relative to heat dissipation. In this paper, the thermal gap pad is applied to the contact between the PCB-based solar panel and the aluminum stiffener mounted on the outside of the panel. Thus, the heat transfer from the solar cell to the rear side of the panel is facilitated. It maximizes the heat dissipation performance while maintaining the merits of PCB panel, and thus, it is possible to improve the power generation efficiency from reducing the temperature of the solar cell. The effectiveness of the thermal design of the 6U cubesat's deployable solar panel using the thermal gap pad has been verified through on-orbit thermal analysis based on the results, compared with the conventional PCB-based solar panel.

• Journal of IKEEE
• /
• v.24 no.4
• /
• pp.1074-1080
• /
• 2020

This paper proposes a digitally controlled buck converter insensitive to process, voltage and temperature and capable of three modes of operation depending on the state of the output voltage. Conventional digital-controlled buck converters utilized A/D converters, counters and delay line circuits for accurate output voltage control, resulting in increasing the number of counter and delay line bits. This problem can be resolved by employing the 8-bit and 16-bit bidirectional shift registers, and this design technique leads a buck converter to be able to control duty ratio up to 128-bit resolution. The proposed buck converter was designed and fabricated with a CMOS 180 nano-meter 1-poly 6-metal process, generating an output voltage of 0.9 to 1.8V with the input voltage range of 2.7V to 3.6V, a ripple voltage of 30mV, and a power efficiency of up to 92.3%. The transient response speed of the proposed circuit was measured to be 4us.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.16 no.8
• /
• pp.5541-5549
• /
• 2015

This paper introduces a safer and more power efficient heater by using induction heating, to apply to the semiconductor wafer fabrication exhaust gas cleaning system. The exhaust gas cleaning system is currently made with filament heater that generates an endothermic reaction of N2 gas for the removal of moisture. Induction theory, through the bases of theoretical optimization and electronic implementation, is applied in the design of the induction heater specifically for the semiconductor wafer exhaust system. The new induction heating design provides a solution to the issues with the current energy inefficient, unreliable, and unsafe design. A robust and calibrated design of the induction heater is used to optimize the energy consumption. Optimization is based on the calibrated ZVS induction circuit design specified by the resonant frequency of the exhaust pipe. The fail-safe energy limiter embedded in the system uses a voltage regulator through the feedback of the MOSFET control, which allows the system performance to operate within the specification of the N2 Heater unit. A specification and performance comparison from current conventional filament heater is made with the calibrated induction heater design for numerical analysis and the proof of a better design.

• Journal of Digital Convergence
• /
• v.14 no.5
• /
• pp.325-331
• /
• 2016

In driving at evening or night, we are not able to recognize the speed bump and so stop suddenly. It could result in accidents. And also, we have a restriction of street light installation in farm road because it could be harmful to the crops and driver could not recognize the walking people. It needs to develop the speed bump with light and streetlight to be non harmful to the crops. So, we develop both the speed bump and streetlight with LED which could be non harmful to the crops and be increased recognition of walking people in farm road. For LED lighting power, we use the solar cells, and piezoelectric elements. It has automatic on/off according to power saving rates without illumination sensor. Minimization of circuit elements and design of minimum resisters and low power LED was used for power saving in assuring 3-days.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.20 no.2
• /
• pp.16-23
• /
• 2006

This paper presents a novel single-stage high frequency resonant inverter link type DC-DC converter using zero voltage switching with high power-factor. The proposed topology is integrated half-bridge boost rectifier as power factor corrector(PFC) and half-bridge high frequency resonant converter into a single-stage. The input stage of the half-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. Simulation results have demonstrated the feasibility of the proposed high frequency resonant converter. Characteristics values based on characteristics analysis through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, fluorescent lamp and DC-DC converter etc.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.20 no.7
• /
• pp.38-45
• /
• 2006

The superconducting fault current limiters(SFCLs) provide the effect such as enhancement in power system reliability due to limiting the fault current within a few miliseconds. Among various SFCLs we have developed a flux-lock type SFCL and exploited a special design to effectively reduce the fault current according to properly adjustable magnetic field after the short-circuit test. This SFCL consists of two copper coils wound in parallel on the same iron core and a component using the YBCO thin film connected in series to the secondary copper coil. Meanwhile, operating characteristics can be controlled by adjusting the inductances and the winding directions of the coils. To analyze the operational characteristics, we compared closed-loop with open-loop iron core. When the applied voltage was 200[Vrms] in the additive polarity winding, the peak values of the line current the increased up to 30.71[A] in the closed-loop and 32.01[A] in the open-loop iron core, respectively. On the other hand, in the voltages generated at current limiting elements were 220.14[V] in the closed-loop and 142.73[V] in the opal-loop iron core during first-half cycle after fault instant under the same conditions. We confirmed that the open-loop iron core had lower power burden than in the closed-loop iron core. Consequently, we found that the structure of iron core enabled the flux-lock type SFCL at power system to have the flexibility.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.17 no.10
• /
• pp.2273-2280
• /
• 2013

This article introduces the next-generation air surveillance system and investigates how to design of front-end low noise amplifier of the ground station receiver. In consideration of the international standard documentation and the performance of existing products, the study conducts the link budget on the entire system so that it can be competitive in terms of receive sensitivity or reliability. To obtain a proper low noise amplifier, standards of design are decided so that such factors as gain, gain flatness, and reflective loss can be optimal. In its design, the bias circuit appropriate for the characteristics of low power, low noise, or high gain was built, and according to the results of the simulation conducted after the optimal design, its gain was 16.24dB, noise factor was 0.36dB, input-output reflective loss was -18dB and -28dB each, and frequency stability was 1.11. According to the results measured after the design, its gain was 17dB, noise factor was 0.51dB, gain flatness was 0.23dB, and input-output reflective loss was -18.28dB and -24.50dB each, so the results gained were suitable for building the overall system.

• KIEE International Transactions on Electrophysics and Applications
• /
• v.5C no.3
• /
• pp.102-110
• /
• 2005

Piezoelectric transformers(PT) are expected to be small, thin and highly efficient, and which are attractive as a transformer with high power density for step down voltage. For these reasons, we have attempted to develop a step-down PT for the miniaturized adaptor. We propose a PT, operating in thickness extensional vibration mode for step-down voltage. This PT consists of a multi-layered construction in the thickness direction. In order to develop the step-down PT of 10 W class and turn ratio of 0.1 with high efficiency and miniaturization, the piezoelectric ceramics and PT designs are estimated with a variety of characteristics. The basic composition of piezoelectric ceramics consists of ternary yPb(Zr$_{x}$Ti$_{1-x}$)O$_{3}$-(1-y)Pb(Mn$_{1/3}$Nb1$_{1/3}$Sb$_{1/3}$)O$_{3}$. In the piezoelectric characteristics evaluations, at y=0.95 and x=0.505, the electromechanical coupling factor(K$_{p}$) is 58$\%$, piezoelectric strain constant(d$_{33}$) is 270 pC/N, mechanical quality factor(Qr$_{m}$) is 1520, permittivity($\varepsilon$/ 0) is 1500, and Curie temperature is 350 $^{\circ}C$. At y = 0.90 and x = 0.500, kp is 56$\%$, d33 is 250 pC/N, Q$_{m}$ is 1820, $\varepsilon$$_{33}$$^{T}$/$\varepsilon$$_{0}$ is 1120, and Curie temperature is 290 $^{\circ}C$. It shows the excellent properties at morphotropic phase boundary regions. PZT-PMNS ceramic may be available for high power piezoelectric devices such as PTs. The design of step-down PTs for adaptor proposes a multi-layer structure to overcome some structural defects of conventional PTs. In order to design PTs and analyze their performances, the finite element analysis and equivalent circuit analysis method are applied. The maximum peak of gain G as a first mode for thickness extensional vibration occurs near 0.85 MHz at load resistance of 10 .The peak of second mode at 1.7 MHz is 0.12 and the efficiency is 92$\%$.