• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.695-698
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• 2003

This paper presents a Si power LDMOSFET for power amplifiers in the 1.8-2.2GHz frequency range for the base station of personal communication systems. To improve the cut-off frequency, the proposed Si power LDMOSFET has small gate to drain capacitance by shielding the electric fields with extended source electrode and forming the field oxide structure in drain region. The proposed Si power LDMOSFET can be used for a power amplifier and it has 32% of power added efficiency and 39.5dBm of output power when the supply voltage is 28V and the operating frequency is 1.9GHz.

• Journal of Advanced Navigation Technology
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• v.23 no.2
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• pp.166-171
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• 2019

This paper has designed a current mode class D power amplifier to increase the transmission efficiency of a 6.78 MHz wireless power transfer (WPT) transmitter and to ensure stable characteristics even when the transmitting and receiving coil intervals change. By reducing the loss due to the parasitic capacitor component of the transistor, which limits the theoretical efficiency of the linear amplifier, this research has improved the efficiency of the power amplifier. The circuit design simulator was used to design the high efficiency amplifier, and the power output and efficiency characteristics according to the load impedance change have been simulated and verified. In the simulation, 42.1 dBm output and 95% efficiency was designed at DC bias 30 V. The power amplifier was fabricated and showed 91% efficiency at the output of 42.1 dBm (16 W). The transmitting and receiving coils were fabricated for wireless power transfer of the drone, and the maximum power added efficiency was 88% and the output power was $42.1dBm{\pm}1.7dB$ according to the load change causing from the coil intervals.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.8 no.6
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• pp.558-567
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• 1997

Linear power amplifier modules with high-efficiency have been developed for PCS handy phone. These modules were designed using extracted large-signal models of MESFETs and harmonic balance simulation. The modules are intended for low-tier and high-tier at the operation frequency range of 1750 ~ 1780 MHz. For low-tier module, the output power and $IMD_3$ were 23.2 dBm and 31 dBc, respectively, at power-added efficiency of 34% with the supply drain bias of 3.6 V. For high-tier module, the output power and $IMD_3$ were 272.2 dBm and 31 dBc, respectively, at power-added efficiency of 33% with the supply drain bias of 4.2 V. These linear power amplifier modules are suitable for PCS handy phone.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.11a
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• pp.31-37
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• 2007

The generation cost of photo voltaic is the most expensive among the renewable energy. To reduce the generation cost of photo voltaic, the proposed method added the regeneration power of elevator. Therefore we have the simulation results the proposed method is 60[%] higher than the previous photo voltaic generation for efficiency of generation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.1
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• pp.32-37
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• 2007

A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.8
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• pp.805-808
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• 2011

This paper presents a design of high-efficiency and high-power class E power transmitter. The transmitter is composed of 300 Watt class E power amplifier and AC-DC converter. The AC-DC converter converts 220 V and 60 Hz AC to a 290 V DC. The generated DC voltage is directly applied to a bias of the class E power amplifier. Because the converter does not have DC-DC converter unit, it has very high conversion efficiency of about 98.03 %. To minimize the loss at the output of the power amplifier, high-Q inductor was implemented and deployed to the output resonant circuit. As a result, the 13.56 MHz class E power amplifier has a high power-added efficiency of 84.2 % at the peak output power of 323.6 W. The overall efficiency of class E power transmitter, including the AC-DC converter, is as high as 82.87 %.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2005.11a
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• pp.81-86
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• 2005

In this paper, we present an efficiency extension of Doherty power amplifier using LDMOS FET devices with different peak output powers and an unequal power divider. The amplifier is designed by using a MRF21045 with P1 dB of 45 W as the main amplifier biased for Class-AB operation and a MRF21090 with P1 dB of 90 W as the peaking amplifier biased for Class-C operation. The input power is divided into a 1:1.5 power ratio between the main and peaking amplifier. The simulated results of the proposed Doherty amplifier shows an efficiency improvement of approximately 19 % in comparison to the class-AB amplifier at an output power of 42.5 dBm. The fabricated Doherty amplifier obtained a PAE of 33.68 % at 9 dB backed off from P1 dB of 51.5 dBm.

• Journal of Advanced Navigation Technology
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• v.27 no.6
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• pp.849-854
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• 2023

In this paper, a high-efficiency power amplifier was designed by applying the operating point Class J using LDMOS(laterally diffused metal oxide semiconductor) and optimizing the output matching circuit so that the second harmonic impedance becomes the reactance impedance. The designed power amplifier has a frequency of 108 ~ 110 MHz, Characteristics of PAE(power added efficiency) is 71.5% at P_SAT output (54.5 dBm), 55.5% at P_1dB output (51.5 dBm), and 24.38% at 45 dBm. The CSB(carrier with sideband) amplifier, which is the reference signal in the spatial modulation method, has an operating output of 45 dBm ~ 35 dBm, and linear SDM(sum in the depth of modulation) characteristics(40% ± 0.3%) were obtained. We measure the characteristics in amplitude modulation according to the bias operating point of the power amplifier for CSB and propose the optimal operating point to obtain linear modulation characteristics.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 2006.07a
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• pp.251-251
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• 2006

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.76-80
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• 2007

In this paper, the PAE (Power Added Efficiency) and the linearity of the Doherty amplifier has been improved using dual bias control and PBG (Photonic BandGap) structure. The PBG structure has used to implement on output matching circuit and dual bias control has applied to improve the PAE of the Doherty amplifier at a low input level by applying it to a carrier amplifier. The Doherty amplifier using the proposed structure has improved PAE by 8% and 5dBc of IMD3 (3rd Inter-Modulation Distortion) compared with those of the conventional class AB amplifier. In addition to, it has been evident that the designed the structure has showed more than a 30% increase in PAE for flatness over all input power level.