• 제목/요약/키워드: Poly-Si TFT-LCD

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TFT-LCD array에 FALC 공정을 적용한 채널영역의 저온결정화 연구 (Low Temperature Poly-Si Crystallization of Channel Region in TFT-LCD Array using FALC Process)

  • 김윤수;최덕균
    • 한국재료학회:학술대회논문집
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    • 한국재료학회 2003년도 추계학술발표강연 및 논문개요집
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    • pp.189-189
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    • 2003
  • 최근, Low-temperature Poly-Si(LTPS) TFT시장이 새롭게 형성됨에 따라 저온결정화 기술 연구가 활발히 진행되고 있다. 그러나, 기존의 저온결정화방법에 비해 수율이 높고 생산단가를 낮출 수 있으며 대 면적 프로세스 적용이 가능한 결정화공정개발이 시급히 필요한 실정이다. 본 연구에서는 TFT-LCD array를 구성하고 있는 데이터 라인과 ITO 공통 전극이 개별 트랜지스터의 소스와 드레인에 연결되어있다는 점에 착안하여, 전계를 이용한 방향성유도결정화법(Field Aided Lateral Crystallization)을 이에 적용하였으며 채널영 역의 균일한 결정화를 위하여 컨택홀의 모양에 변화를 주어 결정화 실험을 진행하였다. 이 방법은 간단한 공정(TFT-LCD way를 통한 전계 인가 및 열처리)으로 패널내의 모든 채널영 역을 균일하게 결정화할 수 있을 것으로 기대되는 방식이다.

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The Characterization of Poly-Si Thin Film Transistor Crystallized by a New Alignment SLS Process

  • Lee, Sang-Jin;Yang, Joon-Young;Hwang, Kwang-Sik;Yang, Myoung-Su;Kang, In-Byeong
    • Journal of Information Display
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    • 제8권4호
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    • pp.15-18
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    • 2007
  • In this paper, we investigated the SLS process to control grain boundary(GB) location in TFT channel region, and it has been found to be applicable for locating the GB at the same location in the channel region of each TFT. We fabricated TFT by applying a new alignment SLS process and compared the TFT characteristics with a normal SLS method and the grain boundary location controlled SLS method. Also, we have analysed degradation phenomena under hot carrier stress conditions for n-type LDD MOSFETs.

저온 Poly-Si TFT 소자의 Hysteresis 특성 개선 (Improvement of Hysteresis Characteristics of Low Temperature Poly-Si TFTs)

  • 정훈주;조봉래;김병구
    • 한국정보전자통신기술학회논문지
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    • 제2권1호
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    • pp.3-9
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    • 2009
  • AMOLED 디스플레이는 LCD에 비해 넓은 시야각, 빠른 응답 속도, 박막화의 용이성 등의 많은 장점들을 갖고 있으나 불균일한 TFT의 전기적 특성과 전원선의 전압 강하에 의한 휘도 불균일, 잔상 현상 및 수명 등과 같은 많은 문제점들이 있다. 이 중에서 본 논문에서는 구동 TFT 소자의 hysteresis 현상에 의해 발생하는 가역적 잔상 현상을 개선하고자 한다. TFT의 hysteresis 특성을 개선하기 위해 게이트 산화막 증착 전에 표면 처리 조건을 변경하였다. 게이트 산화막 증착 전에 실시한 자외선 및 수소 플라즈마 표면 처리는 게이트 산화막과 다결정 실리콘 박막 사이의 계면 trap 밀도를 $3.11{\times}10^{11}cm^{-2}$로 감소시켰고, hysteresis 레벨을 0.23 V로 줄였으며 출력 전류 변화율을 3.65 %로 감소시켰다. 자외선 및 수소 플라즈마 처리를 행함으로써 AMOLED 디스플레이의 가역적 잔상을 많이 개선할 수 있을 것으로 기대된다.

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Poly-Si TFT LCD using p-channel TFTs

  • Ha, Yong-Min;Park, Jae-Deok;Yeo, Ju-Cheon;Kim, Dong-Gil
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2000년도 제1회 학술대회 논문집
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    • pp.153-154
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    • 2000
  • Large size poly-Si TFT-LCDs have been fabricated using p-channel thin film transistors for notebook PC application. We have designed and implemented the data sampling circuit and gate drivers that operate with low power consumption and high reliability. The gate driver has a redundant structure. We have realized the uniform and excellent display quality comparable to that of CMOS module. The reliability of panel is investigated and discussed by measuring the bias stability of transistors.

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New Process Development for Hybrid Silicon Thin Film Transistor

  • Cho, Sung-Haeng;Choi, Yong-Mo;Jeong, Yu-Gwang;Kim, Hyung-Jun;Yang, Sung-Hoon;Song, Jun-Ho;Jeong, Chang-Oh;Kim, Shi-Yul
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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    • pp.205-207
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    • 2008
  • The new process for hybrid silicon thin film transistor (TFT) using DPSS laser has been developed for realizing both low-temperature poly-Si (LTPS) TFT and a-Si:H TFT on the same substrate as a backplane of active matrix liquid crystal display. LTPS TFTs are integrated on the peripheral area of the panel for gate driver integrated circuit and a-Si:H TFTs are used as a switching device for pixel in the active area. The technology has been developed based on the current a-Si:H TFT fabrication process without introducing ion-doping and activation process and the field effect mobility of $4{\sim}5\;cm^2/V{\cdot}s$ and $0.5\;cm^2/V{\cdot}s$ for each TFT was obtained. The low power consumption, high reliability, and low photosensitivity are realized compared with amorphous silicon gate driver circuit and are demonstrated on the 14.1 inch WXGA+ ($1440{\times}900$) LCD Panel.

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Capacitorless 1T-DRAM devices using poly-Si TFT

  • 김민수;정승민;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.144-144
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    • 2010
  • 다결정 실리콘 박막트랜지스터 (poly-Si TFTs)는 벌크실리콘을 이용한 MOSFET소자에 비해 실리콘 박막의 형성이 간단하므로 대면적의 공정이 가능하며 다양한 기판위에 적용이 가능하여 LCD, OLED 등의 디스플레이 기기에 많이 이용되고 있다. 또한 poly-Si TFT는 3차원으로 적층된 소자의 제작이 가능하여 고집적의 한계를 극복할 소자로 주목받고 있다. 최근, DRAM은 캐패시터의 축소화와 구조적 공정이 한계점에 도달했으며 이를 극복하기 위하여 SOI 기판을 사용한 하나의 트랜지스터로 DRAM의 동작을 수행하는 1T-DRAM의 연구가 활발히 진행 중이다. 이러한 1T-DRAM 소자를 대면적과 다층구조의 공정이 가능한 poly-Si TFT를 이용하여 구현하면 초고집적의 메모리 소자를 제작 가능할 것이다. 따라서, 본 연구에서는 다결정 실리콘 박막트랜지스터 (poly-Si TFTs)를 이용한 1T-DRAM의 동작 특성을 연구하였다. 소자의 제작 방법으로는 200 nm의 열산화막이 성장된 p-type 실리콘 기판위에 상부실리콘으로 사용될 비정질 실리콘 박막을 LPCVD 방법으로 증착하였다. 다음으로 248 nm의 파장을 가지는 KrF 레이저를 이용한 eximer laser annealing (ELA) 공정을 통하여 결정화된 상부실리콘층에 TFT 소자를 제작하여 전기적 특성을 평가하였다.

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Recent Trend of Low Temperature Poly Silicon Technologies in TFT-LCD

  • Kim, C.W.;Kim, H.J.;Lee, H.G.;Min, H.G.;Hwang, J.W.;Cho, S.W.;Ryu, C.K.;Lee, C.;Kang, M.K.;Chung, K.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2002년도 International Meeting on Information Display
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    • pp.46-49
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    • 2002
  • Recent trends of low-temperature polycrystalline Si (LTPS) TFT technologies are presented. Characteristics of LTPS TFT processes are compared with those of a-Si TFT's. In order to compete with well-established a-Si TFT-LCD technology, LTPS process has to be as simple as possible. One of the most critical processes, recrystallization of a-Si thin films, could be the process for the differentiation of LTPS technology. Along with these technical reviews, a recent development of the 5.0-inch LTPS TFT-LCD is presented. In order to achieve high-performance display characteristics and save the power consumption, the transflective mode is adopted. The 5.0-inch display with 186 pixel-per-inch, high-resolution LCD was measured to be 10% for the reflectance and 70:1 for the contrast ratio. This display is designed for a high information content hand-held PC (HHPC) application.

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High rate deposition of poly-si thin films using new magnetron sputtering source

  • Boo, Jin-Hyo;Park, Heon-Kyu;Nam, Kyung-Hoon;Han, Jeon-Geon
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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    • pp.186-186
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    • 2000
  • After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

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Poly-Si TFT Technology

  • Noguchi, Takashi;Kim, D.Y.;Kwon, J.Y.;Park, Y.S.
    • 인포메이션 디스플레이
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    • 제5권1호
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    • pp.25-30
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    • 2004
  • Poly-Si TFT(Thin Film Transistor) technology are reviewed and discussed. Poly-Si TFTs fabricated on glass using low-temperature process were studied extensively for the application to LCD (Liquid Crystal Display) as well as to OLED(Organic Light Emitting Diode) Display. Currently, one of the application targets of the poly-Si TFT is emphasized on the highly functional SOG(System on Glass). Improvement of device characteristics such as an enhancement of carrier mobility has been studied intensively by enlarging the grain size. Reduction of the voltage and shrinkage of the device size are the trend of AM FPD(Active Matrix Flat Panel Display) as well as of Si LSI, which will arise a peculiar issue of uniformity for the device performance. Some approaches such as nucleation control of the grain seed or lateral grain growth have been tried, so far.

Development of Rapid Thermal Processor for Large Glass LTPS Production

  • Kim, Hyoung-June;Shin, Dong-Hoon
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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    • pp.533-536
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    • 2006
  • VIATRON TECHNOLOGIES has developed Field-Enhanced Rapid Thermal Processor (FERTP) system that enables LTPS LCD and AMOLED manufacturers to produce poly-Si films at low cost, high throughput, and high yield. The FE-RTP allows the diverse process options including crystallization, thermal oxidation of gate oxides and fast pre-compactions. The process and equipment compatibility with a-Si TFT lines is able to provide a viable solution to produce poly-Si TFTs using a-Si TFT lines.

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