• Title/Summary/Keyword: Plating Process

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Selection of target for the minimum expected loss in plating processes (도금공정에서 최소기대손실을 위한 목표치의 설정)

  • Park, Chang-soon;Kim, Jung-Jun
    • Journal of the Korean Data and Information Science Society
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    • v.21 no.6
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    • pp.1051-1060
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    • 2010
  • In the plating process of the IC chips for the printed circuit board manufacturing, specification limits for the plating thickness are usually given but its target is not specified in most cases. When the target is not specified, the center point of the specification limits is used instead. When the process capability is large, however, the use of the center point for the target is not the best choice in the context of the total cost. In this paper, the total cost is defined in terms of the production cost and the loss function, and then the optimal choice for target is studied in order to minimize the expected loss. As a consequence, the optimal choice of the target reduces the expected loss significantly, while reducing the process capability slightly.

Fabrication of Micro Conductor Pattern on Polymer Material by Laser Induced Surface Activation Technology

  • Lee, Sung-Hyung;Yashiro, Hitoshi;Kure-Chu, Song-Zhu
    • Korean Journal of Materials Research
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    • v.30 no.7
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    • pp.327-332
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    • 2020
  • Laser induced surface activation (LISA) technology requires refined selection of process variables to fabricate conductive microcircuits on a general polymer material. Among the process variables, laser mode is one of the crucial factors to make a reliable conductor pattern. Here we compare the continuous wave (CW) laser mode with the pulse wave (PW) laser mode through determination of the surface roughness and circuit accuracy. In the CW laser mode, the surface roughness is pronounced during the implementation of the conductive circuit, which results in uneven plating. In the PW laser mode, the surface is relatively smooth and uniform, and the formed conductive circuit layer has few defects with excellent adhesion to the polymer material. As a result of a change of laser mode from CW to PW, the value of Ra of the polymer material decreases from 0.6 ㎛ to 0.2 ㎛; the value of Ra after the plating process decreases from 0.8 ㎛ to 0.4 ㎛, and a tight bonding force between the polymer source material and the conductive copper plating layer is achieved. In conclusion, this study shows that the PW laser process yields an excellent conductive circuit on a polymeric material.

A Study on the Deposit Uniformity and Profile of Cu Electroplated in Miniaturized, Laboratory-Scale Through Mask Plating Cell for Printed Circuit Board (PCBs) Fabrication

  • Cho, Sung Ki;Kim, Jae Jeong
    • Korean Chemical Engineering Research
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    • v.54 no.1
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    • pp.108-113
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    • 2016
  • A miniaturized lab-scale Cu plating cell for the metallization of electronic devices was fabricated and its deposit uniformity and profile were investigated. The plating cell was composed of a polypropylene bath, an electrolyte ejection nozzle which is connected to a circulation pump. In deposit uniformity evaluation, thicker deposit was found on the bottom and sides of substrate, indicating the spatial variation of deposit thickness was governed by the tertiary current distribution which is related to $Cu^{2+}$ transport. The surface morphology of Cu deposit inside photo-resist pattern was controlled by organic additives in the electrolyte as it led to the flatter top surface compared to convex surface which was observed in the deposit grown without organic additives.

Formation of Fine Pitch Solder Bump with High Uniformity by the Tilted Electrode Ring (경사진 전극링을 이용한 고균일도의 미세 솔더범프 형성)

  • Ju, Chul-Won;Lee, Kyung-Ho;Min, Byoung-Gue;Kim, Seong-Il;Lee, Jong-Min;Kang, Young-il
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.9
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    • pp.798-802
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    • 2005
  • The plating shape in the opening of photoresist becomes gradated shape in the fountain plating system, because bubbles from the wafer surface are difficult to escape from the deep openings, vias. In this paper, the bubble flow from the wafer surface during plating process was studied and we designed the tilted electrode ring to get uniform bump height on all over the wafer and evaluated the film uniformity by SEM and $\alpha-step$. In a-step measurement, film uniformities in the fountain plating system and the tilted electrode ring contact system were $\pm16.6\%,\;\pm4\%$ respectively.

Corrosion Behavior of Nickel-Plated Alloy 600 in High Temperature Water

  • Kim, Ji Hyun;Hwang, Il Soon
    • Corrosion Science and Technology
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    • v.7 no.1
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    • pp.61-67
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    • 2008
  • In this paper, electrochemical and microstructural characteristics of nickel-plated Alloy 600 were investigated in order to identify the performance of electroless Ni-plating on Alloy 600 in high-temperature aqueous condition with the comparison of electrolytic nickel-plating. For high temperature corrosion test of nickel-plated Alloy 600, specimens were exposed for 770 hours to typical PWR primary water condition. During the test, open circuit potentials (OCP's) of all specimens were measured using a reference electrode. Also, resistance to flow accelerated corrosion (FAC) test was examined in order to check the durability of plated layers in high-velocity flow environment at high temperature. After exposures to high flow rate aqueous condition, the integrity of surfaces was confirmed by using both scanning electron microscopy (SEM) and energy dispersive spectroscopy (EDS). For the field application, a remote process for electroless nickel-plating was demonstrated using a plate specimen with narrow gap on a laboratory scale. Finally, a practical seal design was suggested for more convenient application.

CHARACTERISTICS OF PLATED GOLD LAYER ON ANSI 304 STAINLESS STEEL ACCORDING TO THE VARIATION OF PRETREATMENTS AND ELECTROLYSIS CONDITIONS

  • Lee, Dong-hun;Lee, Jae-Bong
    • Journal of the Korean institute of surface engineering
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    • v.32 no.3
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    • pp.224-234
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    • 1999
  • An attempt was made to characterize the relationship between pretreatment processes, electrolysis conditions and behaviors of the plated gold layer. In order to investigate the effect of pretreatment processes on plating, rest potential measurements of various pretreated stainless steels and a.c.-impedance spectroscopy tests were carried out in the strike plating solution. Characteristics of plated gold layers and adhesions between plated gold layers and stainless steel substrates were examined by scratching tests and micro-Vickers hardness tests. The result shows that the strike plating enhanced the adhesion of interface, the cathodic electro-activation pretreatment process improving both corrosion resistance and adhesion strength. The preferred orientations of plated gold layers were examined by the X-ray diffraction technique. As the current density increases, [111] preferred orientation of plated gold layers was found to become well developed.

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A Study on Ni Electroless Plating Process for Solder Bump COG Technology (COG용 Solder Bump 제작을 위한 Ni 무전해 도금 공정에 관한 연구)

  • Han, Jeong-In
    • Korean Journal of Materials Research
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    • v.5 no.7
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    • pp.794-801
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    • 1995
  • To connect the driver IC and Al coated glass, a method has been developed to plate electrolessly Ni on Al/PR system. It Is necessary to pretreat Al to remove oxide film before plating. In order to find pretreatment process which does not damage photoresist or glass, alkaline and fluoride zincate process have been investigated. Because photoresist and aluminum thin film can easily dissolve in alkaline solution, it is considered that the fluoride zincate process was a suitable one. After immersion in the zincate solution containing 1.5 g/$\ell$ ammonium bifluoride and 100 g/$\ell$ zinc sulfate, electroless nickel plating could be performed. The additive in the zincate solution and thiourea in the plating solution increased smoothness of the plated surface. Acld dip could improve the uniformit of the surface.

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Effect of addition of Tl+ and Pd2+ on the texture and hardness of the non-cyanide gold plating layer (논시안 금도금층의 조직과 경도에 미치는 Tl+ 과 Pd2+ 이온첨가의 영향)

  • Heo, Wonyoung;Son, Injoon
    • Journal of the Korean institute of surface engineering
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    • v.55 no.6
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    • pp.460-468
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    • 2022
  • Due to its high electrical conductivity, low contact resistance, good weldability and high corrosion resi-stance, gold is widely used in electronic components such as connectors and printed circuit boards (PCB). Gold ion salts currently used in gold plating are largely cyan-based salts and non-cyanic salts. The cya-nide bath can be used for both high and low hardness, but the non-cyanide bath can be used for low hardness plating. Potassium gold cyanide (KAu(CN)2) as a cyanide type and sodium gold sulfite (Na3[Au(SO)3]2) salt as a non-cyanide type are most widely used. Although the cyan bath has excellent performance in plating, potassium gold cyanide (KAu(CN)2) used in the cyan bath is classified as a poison and a toxic substance and has strong toxicity, which tends to damage the positive photoresist film and make it difficult to form a straight side-wall. There is a need to supplement this. Therefore, it is intended to supplement this with an eco-friendly process using sodium sulfite sodium salt that does not contain cyan. Therefore, the main goal is to form a gold plating layer with a controllable hardness using a non-cyanide gold plating solution. In this study, the composition of a non-cyanide gold plating solution that maintains hardness even after annealing is generated through gold-palladium alloying by adding thallium, a crystal regulator among electrolysis factors affecting the structure and hardness, and changes in plating layer structure and crystallinity before and after annealing the correlation with the hardness.

Study of defect characteristics by electrochemical plating thickness in copper CMP (Copper CMP에서 Electrochemical Plating 두께에 따른 Defect 특성 연구)

  • Kim, Tae-Gun;Kim, Nam-Hoon;Kim, Sang-Yong;Chang, Eui-Goo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.125-126
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    • 2005
  • Recently semiconductor devices are required more smaller scale and more powerful performance. For smaller scale of device, multilayer structure is proposed. And, for the higher performance, interconnection material is change to copper, because copper has high EM(Electro-migration)and low resistivity. Then copper CMP process is a great role in a multilayer formation of semiconductor. Copper process is different from aluminum process. ECP process is one of the copper processes. In this paper, we focused on the defects tendency by copper thickness which filled using ECP process. we observed hump high and dishing. Conclusively, hump hight reduced at copper thickness increased Also dishing reduced.

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An Empirical Relation between the Plating Process and Accelerator Coverage in Cu Superfilling

  • Cho, Sung-Ki;Kim, Myung-Jun;Koo, Hyo-Chol;Kim, Soo-Kil;Kim, Jae-Jeong
    • Bulletin of the Korean Chemical Society
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    • v.33 no.5
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    • pp.1603-1607
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    • 2012
  • The effects of plating process on the surface coverage of the accelerator were investigated in terms of Cu superfilling for device metallization. When a substrate having 500 nm-wide trench patterns on it was immersed in an electrolyte containing poly (ethylene glycol) (PEG)-chloride ion ($Cl^-$)-bis(3-sulfopropyl) disulfide (SPS) additives without applying deposition potential for such a time of about 100s, voids were generated inside of the electrodeposit. In time-evolved electrochemical analyses, it was observed that the process (immersion without applying potential) in the electrolyte led to the build-up of high initial coverage of SPS-Cl on the surface, resulting in the fast saturation of the coverage. Repeated experiments suggested that the fast saturation of SPS-Cl failed in superfilling while a gradual increase in the SPS-Cl coverage through competition with initially adsorbed PEG-Cl enabled it. Consequently, superfilling was achievable only in the case of applying the plating potential as soon as the substrate is dipped in an electrolyte to prevent rapid accumulation of SPS-Cl on the surface.