• Title/Summary/Keyword: Pitch Array

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Study on the Relationship Between Turbulent Normal Stresses in the Fully Developed Bare Rod Bundle Flow (완전히 발달된 맨봉주위의 난류유동장에서 난류 응력사이의 상관 관계에 대한 연구)

  • Lee, Kye-Bock;Lee, Byung-Jin
    • Nuclear Engineering and Technology
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    • v.27 no.6
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    • pp.888-893
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    • 1995
  • The turbulence structure for fully developed flow through the subchannels formed by the bare rod array depends on the pitch to rod diameter ratio. For fairly open spaced bare rod arrays, the distributions of the three components of the turbulent normal stresses are similar to those measured in circular pipe. However, for more closely spaced arrays, the turbulence structure, especially in the gap region, depart markedly from the pipe flow distribution. A linear relationship between turbulent normal stresses and turbulent kinetic energy for fully developed turbulent flow through regularly spaced bare rod arrays has been developed. This correlation can be used in connection with various theoretical analyses applied in turbulence research.

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Effect of Underfill on $\mu$BGA Reliability ($\mu$BGA 장기신뢰성에 미치는 언더필영향)

  • 고영욱;신영의;김종민
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.05a
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    • pp.138-141
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    • 2002
  • There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.

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Preconditions for High Speed Confocal Image Acquisition with DMD Scanning.

  • Shim, S.B.;Lee, K.J.;Lee, J.H.;Hwang, Y.H.;Han, S.O.;Pak, J.H.;Choi, S.E.;Milster, Tom D.;Kim, J.S.
    • Proceedings of the Optical Society of Korea Conference
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    • 2006.07a
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    • pp.39-40
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    • 2006
  • Digital image-projection and several modifications are the classical applications of Digital Micromirror Devices (DMD), however further applications in the field of optical metrology are also available. Operated with certain patterns, a DMD can function, for instance, as an array of pinholes that may substitute the Galvanic mirror or the stage scanning system presently used for 2 dimensional scanning in confocal microscopes. The various process parameters that influence the result of measurement (e.g. pinhole size, lateral scanning pitch and the number of pinholes used simultaneously, etc.) should be configured precisely for individual measurements by appropriately operating the DMD. This paper presents suitable conditions for the diffraction limited analysis between DMD-optics-CCD to achieve the best performance. Also sampling theorem that is necessary for the image acquisition by scanning system is simulated with OPTISCAN which is the simulator based on the diffraction theory.

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A study on the injection molding technology for thin wall plastic part (초정밀 박육 플라스틱 제품 성형기술에 관한 연구)

  • Heo, Young-Moo;Shin, Kwang-Ho
    • Design & Manufacturing
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    • v.10 no.2
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    • pp.50-54
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    • 2016
  • In the semiconductor industry the final products were checked for several environments before sell the products. The burning test of memory and chip was implemented in reliability for all of parts. The memory and chip were developed to high density memory and high performance chip, so circuit design was also high integrated and the test bed was needed to be thin and fine pitch socket. LGA(Land Grid Array) IC socket with thin wall thickness was designed to satisfy this requirement. The LGA IC socket plastic part was manufacture by injection molding process, it was needed accuracy, stiffness and suit resin with high flowability. In this study, injection molding process analysis was executed for 2 and 4 cavities moldings with runner, gate and sprue. The warpage analysis was also implemented for further gate removal process. Through the analyses the total deformations of the moldings were predicted within maximum 0.05mm deformation. Finally in consideration of these results, 2 and 4 cavities molds were designed and made and tested in injection molding process.

Study for Visualization of Rotating Sound Source Using Microphone Array (마이크로폰 어레이를 이용한 회전하는 소음원 가시화에 관한 연구)

  • Rhee, Wook;Park, Sung;Lee, Ja-Hyung;Kim, Jai-Moo;Choi, Jong-Soo
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.16 no.6 s.111
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    • pp.565-573
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    • 2006
  • Acoustic analysis of a moving sound source required that the measured sound signals be do-Dopplerized and restored as of the original emission signals. The purpose of this research is development of beamforming technique can be applied to the rotor noise source identification. For the do-Dopplerization and reconstruction of emitted sound wave, Forward Propagation Method is applied to the time domain beamforming technique. And validation test were performed using rotating sound source constructed by bended pipe and horn driver. In the validation test using sinusoidal sound wave, sufficient performance of signal processing can be seen, and the effect of measuring duration for accuracy was compared. In the prop-rotor measurements, the acoustic source locations were successfully verified in varying positions for different frequencies and collective pitch angle, in hover condition.

BUMPLESS FLIP CHIP PACKAGE FOR COST/PERFORMANCE DRIVEN DEVICES

  • Lin, Charles W.C.;Chiang, Sam C.L.;Yang, T.K.Andrew
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.09a
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    • pp.219-225
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    • 2002
  • This paper presents a novel "bumpless flip chip package"for cost! performance driven devices. Using the conventional electroplating and etching processes, this package enables the production of fine pitch BGA up to 256 I/O with single layer routing. An array of circuitry down to $25-50{\mu}{\textrm}{m}$ line/space is fabricated to fan-in and fan-out of the bond pads without using bumps or substrate. Various types of joint methods can be applied to connect the fine trace and the bond pad directly. The resin-filled terminal provides excellent compliancy between package and the assembled board. More interestingly, the thin film routing is similar to wafer level packaging whereas the fan-out feature enables high lead count devices to be accommodated in the BGA format. Details of the design concepts and processing technology for this novel package are discussed. Trade offs to meet various cost or performance goals for selected applications are suggested. Finally, the importance of design integration early in the technology development cycle with die-level and system-level design teams is highlighted as critical to an optimal design for performance and cost.

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One-key Keyboard: A Very Small QWERTY Keyboard Supporting Text Entry for Wearable Computing (원키 키보드: 웨어러블 컴퓨팅 환경에서 문자입력을 지원하는 초소형 QWERTY 키보드)

  • Lee, Woo-Hun;Sohn, Min-Jung
    • Journal of the HCI Society of Korea
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    • v.1 no.1
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    • pp.21-28
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    • 2006
  • Most of the commercialized wearable text input devices are wrist-worn keyboards that have adopted the minimization method of reducing keys. Generally, a drastic key reduction in order to achieve sufficient wearability increases KSPC(Keystrokes per Character), decreases text entry performance, and requires additional effort to learn a new typing method. We are faced with wearability-usability tradeoff problems in designing a good wearable keyboard. To address this problem, we introduced a new keyboard minimization method of reducing key pitch. From a series of empirical studies, we found the potential of a new method which has a keyboard with a 7mm key pitch, good wearability and social acceptance in terms of physical form factors, and allows users to type 15.0WPM in 3 session trials. However, participants point out that a lack of passive haptic feedback in keying action and visual feedback on users' input deteriorate the text entry performance. We have developed the One-key Keyboard that addresses this problem. The traditional desktop keyboard has one key per character, but the One-key Keyboard has only one key ($70mm{\times}35mm$) on which a 10*5 QWERTY key array is printed. The One-key Keyboard detects the position of the fingertip at the time of the keying event and figures out the character entered. We conducted a text entry performance test comprised of 5 sessions. The participants typed 18.9WPM with a 6.7% error rate over all sessions and achieved up to 24.5WPM. From the experiment's results, the One-key Keyboard was evaluated as a potential text input device for wearable computing, balancing wearability, social acceptance, input speed, and learnability.

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Implementation of Readout IC for $8\times8$ UV-FPA Detector ($8\times8$ UV-PPA 검출기용 Readout IC의 설계 및 제작)

  • Kim, Tae-Min;Shin, Gun-Soon
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.3
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    • pp.503-510
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    • 2006
  • Readout circuit is to convert signal occurred in a defector into suitable signal for image signal processing. In general, it has to possess functions of impedance matching with perception element, amplification, noise reduction and cell selection. It also should satisfies conditions of low-power, low-noise, linearity, uniformity, dynamic range, excellent frequency-response characteristic, and so on. The technical issues in developing image processing equipment for focal plane way (FPA) can be categorized as follow: First, ultraviolet (UV) my detector material and fine processing technology. Second, ReadOut IC (ROIC) design technology to process electric signal from detector. Last, package technology for hybrid bonding between detector and ROIC. ROIC enables intelligence and multi-function of image equipment. It is a core component for high value added commercialization ultimately. Especially, in development of high-resolution image equipment ROIC, it is necessary that high-integrated and low-power circuit design technology satisfied with design specifications such as detector characteristic, signal dynamic range, readout rate, noise characteristic, ceil pitch, power consumption and so on. In this paper, we implemented a $8\times8$ FPA prototype ROIC for reduction of period and cost. We tested unit block and overall functions of designed $8\times8$ FPA ROIC. Also, we manufactured ROIC control and image boards, and then were able to verify operation of ROIC by confirming detected image from PC's monitor through UART(Universal Asynchronous Receiver Transmitter) communication.

Study on a moir$\acute{e}$ Artifact in the Use of Carbon Interspaced Antiscatter Grids for Digital Radiography (탄소 중간물질 그리드를 사용한 DR system에서의 moir$\acute{e}$ artifact에 관한 연구)

  • Lee, Sung-Ju;Cho, Hyo-Sung;Choi, Sung-Il;Cho, Hee-Moon;Oh, Ji-Eun;Lee, So-Young;Park, Yeon-Ok;Lee, Min-Sik
    • Journal of the Korean Society of Radiology
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    • v.2 no.4
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    • pp.5-9
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    • 2008
  • Antiscatter grids are widely used in radiography to remove scattered X-rays and thus improve the image contrast. However, the use of grids makes moir$\acute{e}$ artifact in the digital image, and this can be a critical reason for a mistaken diagnosis. In this paper, we examined that moire artifacts are how to relate with grid frequency, pixel pitch and grid rotation angle. To experiment we prepared 6 grids having different line frequencies (4.0 to 8.5lines/mm) and tested with a DR imager having a $139{\mu}m{\times}139{\mu}m$ pixel size. In the result of this experiment, we could get data about moir$\acute{e}$ artifact that could be make solution to remove the line artifact for the successful use of the grid in digital radiography. The acquired data and theory through this experiment, are expected to make contribution to the elimination of moir$\acute{e}$ artifact in the DR system.

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Color Filter Based on a Sub-wavelength Patterned Metal Grating (광파장 이하 주기를 갖는 금속 격자형 컬러필터)

  • Lee, Hong-Shik;Yoon, Yeo-Taek;Lee, Sang-Shin;Kim, Sang-Hoon;Lee, Ki-Dong
    • Korean Journal of Optics and Photonics
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    • v.18 no.6
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    • pp.383-388
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    • 2007
  • A color filter was demonstrated incorporating a patterned metal grating in a quartz substrate. The filter is created in a metal layer perforated with a symmetric two-dimensional array of circular holes, with the pitch smaller than the wavelength of the visible light. A finite-difference time-domain simulation was performed to analyze the device by investigating the effect of structural parameters like the grating height, the period, the hole size, and the refractive index of the hole-filling material on its performance. The device performance was especially optimized by controlling the refractive index of the material comprising the holes of the grating. And two different devices were fabricated by means of the e-beam direct writing with the following design parameters: the grating height of 50 nm, the two pitches of 340 nm for the red color and 260 nm for the green color. For the prepared device with the period of 340 nm, the center wavelength was 680 nm and the peak transmission 57%. And for the other device with the pitch of 260 nm, the center wavelength was 550 nm and the peak transmission was 50%. The filling of the hole with a material whose refractive index is matched to that of the substrate has led to an increase of ${\sim}15%$ in the transmission efficiency.