• Wind and Structures
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• 제39권3호
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• pp.175-190
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• 2024

Aerodynamic shape optimization is very useful for enhancing the performance of wind-sensitive structures. However, shape parameterization, as the first step in the pipeline of aerodynamic shape optimization, still heavily depends on empirical judgment. If not done properly, the resulting small design space may fail to cover many promising shapes, and hence hinder realizing the full potential of aerodynamic shape optimization. To this end, developing a novel shape parameterization scheme that can reflect real-world complexities while being simple enough for the subsequent optimization process is important. This study proposes a machine learning-based scheme that can automatically learn a low-dimensional latent representation of complex aerodynamic shapes for bluff-body wind-sensitive structures. The resulting latent representation (as design variables for aerodynamic shape optimization) is composed of both discrete and continuous variables, which are embedded in a hierarchy structure. In addition to being intuitive and interpretable, the mixed discrete and continuous variables with the hierarchy structure allow stakeholders to narrow the search space selectively based on their interests. As a proof-of-concept study, shape parameterization examples of tall building cross sections are used to demonstrate the promising features of the proposed scheme and guide future investigations on data-driven parameterization for aerodynamic shape optimization of wind-sensitive structures.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.917-920
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• 2005

This paper presents 3D graphics geometry processor for mobile applications. Geometry stage needs to cope with the large amount of computation. Geometry stage consists of transformation process and lighting process. To deal with computation in geometry stage, the vector processor that is based on pipeline chaining is proposed. The performance of proposed 3D graphics geometry processor is up to 4.3M vertex/sec at 100 MHz. Also, the designed processor is compliant with OpenGL ES that is widely used for standard API of embedded system. The proposed structure can be efficiently used in 3D graphics accelerator for mobile applications.

• JSTS:Journal of Semiconductor Technology and Science
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• 제12권4호
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• pp.388-396
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• 2012

In this paper, a $320{\times}240$ pixel, 80 frame/s CMOS image sensor with a low power dual correlated double sampling (CDS) scheme is presented. A novel 8-bit hold-and-go counter in each column is proposed to obtain 10-bit resolution. Furthermore, dual CDS and a configurable counter scheme are also discussed to realize efficient power reduction. With these techniques, the digital counter consumes at least 43% and at most 61% less power compared with the column-counters type, and the frame rate is approximately 40% faster than the double memory type due to a partial pipeline structure without additional memories. The prototype sensor was fabricated in a Samsung $0.13{\mu}m$ 1P4M CMOS process and used a 4T APS with a pixel pitch of $2.25{\mu}m$. The measured column fixed pattern noise (FPN) is 0.10 LSB.

• Ocean Systems Engineering
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• 제5권4호
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• pp.301-318
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• 2015

The present investigations introduce the shell-finite element discretization for the dynamics of slender marine pipelines. A long catenary pipeline, corresponding to a particular Steel Catenary Riser (SCR), is investigated under long-standing cyclic loading. The long structure is divided into smaller tubular parts which are discretized with 8-node planar shell elements. The transient analysis of each part is carried out by the implicit time integration scheme, within a Finite Elements (FE) solver. The time varying external loads and boundary conditions on each part are the results of a prior solution of an integrated line-dynamics model. The celebrated FE approximation can produce a more detailed stress distribution along the structural surface than the simplistic "line-dynamics" approach.

• 한국해양공학회지
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• 제34권3호
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• pp.194-201
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• 2020

In this study, an optical-fiber sensor was used to measure loads that could act in an environment similar to the loading conditions that exist in an actual pipe. The structure and the installation method of the optical-fiber strain sensor were applied considering the actual large pipe and the buried pipe environment. Load tests were performed using a displacement sensor and sandbags to determine the deflection of the pipe according to the external load, and the linear measurement results were verified. Considering the conditions that could exist in the actual pipe, the test method was presented, and the strain of the buried pipe generated at this time was measured.

• Progress in Superconductivity
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• 제5권1호
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• pp.21-25
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• 2003

We have designed and simulated an 1-bit ALU (Arithmetic Logic Unit) by using a half adder. An ALU is the part of a computer processor that carries out arithmetic and logic operations on the operands in computer instruction words. The designed ALU had limited operation functions of OR, AND, XOR, and ADD. It had a pipeline structure. We constructed an 1-bit ALU by using only one half adder and three control switches. We designed the control switches in two ways, dc switch and NDRO (Non Destructive Read Out) switch. We used dc switches because they were simple to use. NDRO pulse switches were used because they can be easily controlled by control signals of SET and RESET and show fast response time. The simulation results showed that designed circuits operate correctly and the circuit minimum margins were ＋/-27%. In this work, we used simulation tools of XIC and WRSPICE. The circuit layouts were also performed. The circuits are being fabricated.

• 전자공학회논문지B
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• 제31B권5호
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• pp.12-25
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• 1994

A two dimensional constant geometry FFT algorithms and architectures with shuffled inputs and normally ordered outputs are presented. It is suitable for VLSI implementation because all buterfly stages have identical, regular structure. Also a methodology using shuffled FFT inputs and outputs to halve the number of butterfly stages connected by a global interconnection which requires much area is presented. These algorithms can be obtained by shuffling the row and column of a decomposed FFT matrix which corresponds to one butterfly stage. Using non-recursive and recursive pipeline, the degree of serialism and parallelism in FFT computation can be adjusted. To implement high performance high radix FFT easily and reduce the amount of interconnections between stages, the method to build a high radix PE with lower radix PE 's is discussed. Finally the performances of the present architectures are evaluated and compared.

• 전자공학회논문지B
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• 제31B권5호
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• pp.162-167
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• 1994

The binary image normalization method in image processing can be used in several fields, Especially, its high speed processing method and its hardware implmentation is more useful, A normalization process of each character in character recognition requires a lot of processing time. Therefore, the research was done as a part of high speed process of OCR (optical character reader) implementation as a pipeline structure with host computer in hardware to give temporal parallism. For normalization process, general purpose CPU,MC68000, was used to implement it. As a result of experiment, the normalization speed of the hardware is sufficient to implement high speed OCR which the recognition speed is over 140 characters per second.

• 한국컴퓨터정보학회논문지
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• 제7권4호
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• pp.89-93
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• 2002

본 논문에서는 32비트 DSP에 사용 가능한 ALU를 설계하였다. 이 ALU는 32비트 연산을 기본 단위로 하고 있으며 5단 파이프라인 중에서 execution 단계에 해당된다. ALU에서 지원하는 기능은 덧셈, 뺄셈, 나눗셈과 같은 산술연산, AND, XOR과 같은 논리연산, 그리고 쉬프트 등이다. 기능별로 여러 기능 블록을 사용하지 않는 대신 몇 개의 기능 블록만을 만들고, 회로 동작이 이 기능 블록들을 공유하도록 설계하였으며, ALU를 설계하기 위해 각 기능 블록을 HDL로 기술하여 시뮬레이션을 수행하였다. 이ALU는 32 비트 DSP에 사용 가능하도록 설계되었다.

• 한국통신학회논문지
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• 제30권6A호
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• pp.526-534
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• 2005

본 논문은 SMDL을 이용하여 임베디드 프로세서 코어를 자동 생성해 주는 임베디드 코어 자동 생성 시스템의 구조와 동작에 대해 설명하고 있다. 이러한 SMDL 기술을 통해 제안된 시스템에서는 파이프라인 구조의 데이터패스와 컨트롤 유닛으로 구성된 메모리 모듈을 가진 프로세서 코어를 생성하게 된다. 생성된 코어는 메모리 억세스를 정상적으로 수행할 수 있도록 멀티 싸이클 인스트럭션을 지원하고, 파이프라인 프로세서 상에서 생길 수 있는 파이프라인 해저드를 처리할 수 있다. 실험 결과를 통해서 생성된 코어의 정확성을 확인할 수 있다.