• Korean Chemical Engineering Research
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• v.48 no.1
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• pp.33-38
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• 2010

A microfluidic system has been developed using biomaterial for the measurement of cupric ion concentration. The cell-membrane-mimicking bilayer lipid membrane(BLM)-coated silver electrode was used for the sensing of cupric ion concentration. The silver-supported BLM could increase its stability. A silver-supported bilayer lipid membrane(s-BLM) was easily obtained using its self-assembling characteristics by immersing silver wire into lipid(phosphatidylcholine; PC) solution and then dipping into aqueous KCl solution. These s-BLMs were used to determine the relationship between $Cu^{2+}$ concentration and current crossing s-BLM. Their relationship showed high linearity and reproducibility. The calibration curve was constructed to express the relationship between $Cu^{2+}$ concentration and current in the $Cu^{2+}$ concentration range of 10 and $130{\mu}M$. This calibration curve was used to measure $Cu^{2+}$ concentration in an unknown sample. Microfluidic system with s-BLM was made of PDMS(polydimethyl siloxane) using typical soft photolithography and molding technique. This integrated system has various functions such as activation of the silver surface without cutting silver wire, coating of BLM on silver surface, injection of KCl buffer solution, injection of $Cu^{2+}$ sample and measurement of $Cu^{2+}$ concentration in the sample.

• Journal of the Microelectronics and Packaging Society
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• v.13 no.1 s.38
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• pp.1-5
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• 2006

We prepared 80 nm-thick TiSix on each 70 nm-thick amorphous silicon and polysilicon substrate using an RF sputtering with $TiSi_2$ target. TiSix composite silicide layers were stabilized by rapid thermal annealing(RTA) of $800^{\circ}C$ for 20 seconds. Line width of $0.5{\mu}m$ patterns were embodied by photolithography and dry etching process, then each additional annealing process at $750^{\circ}C\;and\;850^{\circ}C$ for 3 hours was executed. We investigated the change of sheet resistance with a four-point probe, and cross sectional microstructure with a field emission scanning electron microscope(FE-SEM) and transmission electron microscope(TEM), respectively. We observe an abrupt change of resistivity and voids at the silicide surface due to interdiffusion of silicide and composite titanium silicide in the amorphous substrates with additional $850^{\circ}C$ annealing. Our result implies that the electrical resistance of composite titanium silicide may be tunned by employing appropriate substrates and annealing condition.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.344-344
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• 2014

Transparent amorphous oxide semiconductors such as a In-Ga-Zn-O (a-IGZO) have advantages for large area electronic devices; e.g., uniform deposition at a large area, optical transparency, a smooth surface, and large electron mobility >10 cm2/Vs, which is more than an order of magnitude larger than that of hydrogen amorphous silicon (a-Si;H).1) Thin film transistors (TFTs) that employ amorphous oxide semiconductors such as ZnO, In-Ga-Zn-O, or Hf-In-Zn-O (HIZO) are currently subject of intensive study owing to their high potential for application in flat panel displays. The device fabrication process involves a series of thin film deposition and photolithographic patterning steps. In order to minimize contamination, the substrates usually undergo a cleaning procedure using deionized water, before and after the growth of thin films by sputtering methods. The devices structure were fabricated top-contact gate TFTs using the a-IGZO films on the plastic substrates. The channel width and length were 80 and 20 um, respectively. The source and drain electrode regions were defined by photolithography and wet etching process. The electrodes consisting of Ti(15 nm)/Al(120 nm)/Ti(15nm) trilayers were deposited by direct current sputtering. The 30 nm thickness active IGZO layer deposited by rf magnetron sputtering at room temperature. The deposition condition is as follows: a rf power 200 W, a pressure of 5 mtorr, 10% of oxygen [O2/(O2+Ar)=0.1], and room temperature. A 9-nm-thick Al2O3 layer was formed as a first, third gate insulator by ALD deposition. A 290-nm-thick SS6908 organic dielectrics formed as second gate insulator by spin-coating. The schematic structure of the IGZO TFT is top gate contact geometry device structure for typical TFTs fabricated in this study. Drain current (IDS) versus drain-source voltage (VDS) output characteristics curve of a IGZO TFTs fabricated using the 3-layer gate insulator on a plastic substrate and log(IDS)-gate voltage (VG) characteristics for typical IGZO TFTs. The TFTs device has a channel width (W) of $80{\mu}m$ and a channel length (L) of $20{\mu}m$. The IDS-VDS curves showed well-defined transistor characteristics with saturation effects at VG>-10 V and VDS>-20 V for the inkjet printing IGZO device. The carrier charge mobility was determined to be 15.18 cm^2 V-1s-1 with FET threshold voltage of -3 V and on/off current ratio 10^9.

• Applied Chemistry for Engineering
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• v.24 no.6
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• pp.593-598
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• 2013

In this study, we have evaluated the water absorption phenomenon of photoresist dry film, which is commonly used to build circuits on PCB (Printed Circuit Board) by photolithography, by using ATR-FTIR (Attenuated Total Reflectance-Fourier Transform Infrared). We have firstly observed significant change in fracture mode of dry film with respect to temperature and humidity, which we assumed the material transition from ductile to brittle. Secondly, we have established the process of absorption test for determining the diffusion coefficients of water into the dry film both with gravimeter and ATR-FTIR. We have successfully calculated the diffusion coefficients for each environmental conditions from the results which we achieved by gravimeter and ATR-FTIR. Compared to the gravimeter which is a conventional method for absorption test, the ATR-FTIR method in this study has been found to be very easy to use and have the same accuracy as gravimeter. Moreover, we are expecting to use the ATR-FTIR as an appropriate method to study the absorption phenomena related to any kinds of solvent and polymer system.

• Journal of the Korean Vacuum Society
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• v.20 no.1
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• pp.22-29
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• 2011

An infrared thermographic imaging module of [$320{\times}256$] focal-plane array (FPA) based on [InAs/GaSb] strained-layer superlattice (SLS) was fabricated, and its images were demonstrated. The p-i-n device consisted of an active layer (i) of 300-period [13/7]-ML [InAs/GaSb]-SLS and a pair of p/n-electrodes of (60/115)-period [InAs:(Be/Si)/GaSb]-SLS. FTIR photoresponse spectra taken from a test device revealed that the peak wavelength (${\lambda}_p$) and the cutoff wavelength (${\lambda}_{co}$) were approximately $3.1/2.7{\mu}m$ and $3.8{\mu}m$, respectively, and it was confirmed that the device was operated up to a temperature of 180 K. The $30/24-{\mu}m$ design rule was applied to single pixel pitch/mesa, and a standard photolithography was introduced for [$320{\times}256$]-FPA fabrication. An FPA-ROIC thermographic module was accomplished by using a $18/10-{\mu}m$ In-bump/UBM process and a flip-chip bonding technique, and the thermographic image was demonstrated by utilizing a mid-infrared camera and an image processor.

• Journal of the Microelectronics and Packaging Society
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• v.17 no.3
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• pp.43-49
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• 2010

Direct printing technology is an attractive metallization method, which has become immerging as "Green technology" to the conventional photolithography, on account of low cost, simple process and environment-friendliness. In order to commercialize the printed electronics in industry, it is essential to evaluate the electrical properties of conductive circuits using direct printing technology. In this contribution, we focused on the electrical characteristics of inkjet-printed circuits. A Cu nanoink was inkjet-printed onto a Bisaleimide triazine(BT) substrate with parallel transmission line(PTL) and coplanar waveguide(CPW) type, then was sintered at $250^{\circ}C$ for 30 min. We calculated the resistivity of printed circuits through direct current resistance by the measurement of I-V curve: the resistivity was approximately 0.558 ${\mu}{\Omega}{\cdot}cm$ which is about 3.3 times that of bulk Cu. Cascade's probe system in the frequency range from 0 to 30 GHz were employed to measure the Scattering parameter(S-parameter) with or without a gap between the substrate and the probe station chuck. The result of measured S-parameter showed that all printed circuits had over 5 dB of return loss in the entire frequency range. In the curve of insertion loss, $S_{21}$, showed that the PTL type circuits had better transmission of radio frequency (RF) than CPW type.

• Journal of the Korean Magnetics Society
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• v.25 no.4
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• pp.117-122
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• 2015

The holes with a diameter of $35{\mu}m$ inside the GMR-SV (giant magnetoresistance-spin valve) film were patterned by using the photolithography process and ECR (electron cyclotron resonance) Ar-ion milling. From the magnetoresistance curves of the GMR-SV film with holes measuring by 4-electrode method, the MR (magnetoresistance ratio) and MS (magnetic sensitivity) are almost same as the values of initial states. On other side hand, the $H_{ex}$ (exchange bias coupling field) and $H_c$ (coercivity) dominantly increased from 120 Oe and 10 Oe to 190 Oe and 41 Oe as increment of the number of holes inside GMR-SV film respectively. These results were shown to be attributed to major effect of EMD (easy magnetic domian) having a region positioned between two holes perpendicular to the sensing current. On the basis of this study, the fabrication of GMR-SV applying to the hole formation improved the magnetoresistance properties having the thermal stability and durability of bio-device.

• Journal of the Microelectronics and Packaging Society
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• v.12 no.2 s.35
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• pp.111-119
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• 2005

Stack specimen with three dimensional interconnection structure through Cu via of $75{\mu}m$ diameter, $90{\mu}m$ height and $150{\mu}m$ pitch was successfully fabricated using subsequent processes of via hole formation with Deep RIE (reactive ion etching), Cu via filling with pulse-reverse electroplating, Si thinning with CMP, photolithography, metal film sputtering, Cu/Sn bump formation, and flip chip bonding. Contact resistance of Cu/Sn bump and Cu via resistance could be determined ken the slope of the daisy chain resistance vs the number of bump joints of the flip chip specimen containing Cu via. When flip- chip bonded at $270^{\circ}C$ for 2 minutes, the contact resistance of the Cu/Sn bump joints of $100{\times}100{\mu}m$ size was 6.7m$\Omega$ and the Cu via resistance of $75{\mu}m$ diameter, $90{\mu}m$ height was 2.3m$\Omega$.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.1
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• pp.33-38
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• 2007

We studied a bonding at low temperature using polymer bump and Non-Conductive Adhesive (NCA), and studied the reliability of the polymer bump/Al pad joints. The polymer bumps were formed on oxidized Si substrates by photolithography process, and the thin film metals were formed on the polymer bumps using DC magnetron sputtering. The substrate used was AL metallized glass. The polymer bump and Al metallized glass substrates were joined together at $80^{\circ}C$ under various pressure. Two NCAs were applied during joining. Thermal cycling test ($0^{\circ}C-55^{\circ}C$, cycle/30 min) was carried out up to 2000 cycles to evaluate the reliability of the joints. The bondability was evaluated by measuring the contact resistance of the joints through the four point probe method, and the joints were observed by Scanning Electron Microscope (SEM). The contact resistance of the joints was $70-90m{\Omega}$ before the reliability test. The joints of the polymer bump/Al pad were damaged by NCA filler particles under pressure above 200 MPa. After reliability test, some joints were electrically failed since thinner metal layers deposited at the edge of bumps were disconnected.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.421-427
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• 2009

We successfully fabricated 4.7-inch organic thin film transistors array with $640{\times}480$ pixels on flexible substrate. All the processes were done by photolithography, spin coating and ink-jet printing. The OTFT-Electrophoretic (EP) pixel structure, based on a top gate OTFT, was fabricated. The mobility, ON/OFF ratio, subthreshold swing and threshold voltage of OTFT on flexible substrate are: 0.01 ^2/V-s, 1.3 V/dec, 10E5 and -3.5 V. After laminated the EP media on OTFT array, a panel of 4.7-inch $640{\times}480$ OTFT-EPD was fabricated. All of process temperature in OTFT-EPD is lower than $150^{\circ}C$. The pixel size in our panel is $150{\mu}m{\times}150{\mu}m$, and the aperture ratio is 50 %. The OTFT channel length and width is 20 um and 200um, respectively. We also used OTFT to drive EP media successfully. The operation voltages that are used on the gate bias are -30 V during the row data selection and the gate bias are 0 V during the row data hold time. The data voltages that are used on the source bias are -20 V, 0 V, and 20 V during display media operation.