• Title/Summary/Keyword: Photo resist

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Investigation of Conductive Pattern Line for Direct Digital Printing (디지털 프린팅을 위한 전도성 배선에 관한 연구)

  • Kim, Yong-Sik;Seo, Shang-Hoon;Lee, Ro-Woon;Kim, Tae-Hoon;Park, Jae-Chan;Kim, Tae-Gu;Jeong, Kyoung-Jin;Yun, Kwan-Soo;Park, Sung-Jun;Joung, Jae-Woo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.502-502
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    • 2007
  • Current thin film process using memory device fabrication process use expensive processes such as manufacturing of photo mask, coating of photo resist, exposure, development, and etching. However, direct printing technology has the merits about simple and cost effective processes because inks are directly injective without mask. And also, this technology has the advantage about fabrication of fine pattern line on various substrates such as PCB, FCPB, glass, polymer and so on. In this work, we have fabricated the fine and thick metal pattern line for the electronic circuit board using metal ink contains Ag nano-particles. Metal lines are fabricated by two types of printing methods. One is a conventional printing method which is able to quick fabrication of fine pattern line, but has various difficulties about thick and high resolution DPI(Dot per Inch) pattern lines because of bulge and piling up phenomenon. Another(Second) methods is sequential printing method which has a various merits of fabrication for fine, thick and high resolution pattern lines without bulge. In this work, conductivities of metal pattern line are investigated with respect to printing methods and pattern thickness. As a result, conductivity of thick pattern is about several un.

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Processing Study for the Micro Pillar for Piezoelectric Energy Harvest (압전 에너지 하베스트를 위한 마이크로 필라 공정 연구)

  • Yun, Seok-Woo;Lee, Ku-Tak;Lee, Kyoung-Su;Jeong, Soon-Jong;Kim, Min-Soo;Cho, Kyoung-Ho;Koh, Jung-Hyuk
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.23 no.8
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    • pp.601-604
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    • 2010
  • In this study, the piezoelectric energy harvester was investigated employing the pillar structure with the diameter size of 50~500 um. Usually, the aspect ratio between the height and diameter was related with the piezoelectric performance. High aspect ratio was showed the low electric noise and high piezoelectric properties than low aspect ratio. Therefore, we have selected the Su-8 photo-resist and modified lithography process to manufacture the pillar structure with height above the 250 ${\mu}m$. In this presentation, we will report the process and properties of micro pillar structure based on the PMN-PZT (Pb$(Mg_{1/3}Nb_{2/3})O_3$-PbZrTiO$_3$) materials.

The Optimization of Indium Zinc Oxide Thin Film Process in Color Filter on Array structure

  • Lee, Je-Hun;Kim, Jin-Suek;Jeong, Chang-Oh;Kim, Shi-Yul;Lim, Soon-Kwon;Souk, Jun-Hyung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.1244-1247
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    • 2004
  • For obtaining the best panel quality of color filter on array(COA) architecture in TFF LCD, we investigated the influence of deposition temperature, $O_2$ flow, thickness on the optical transmittance, wet etching and adhesion properties of IZO deposited onto each color photo resist(red, green, blue). Average transmittance of the pixel single layer in the visible range(between 380 and 780nm) was mainly affected by thickness and showed maximum at 1250 ${\AA}$ while the thickness showing peak transparency in each R, G, B wavelength was different. The relation was calculated by using bi-layer transmission and reflectance model, which corresponded to experimental data very well. The adhesion of IZO deposited on each color PR was found to have enhanced value except red PR case, compared to that of IZO which was deposited on $SiN_x$. Wet etching pattern linearity was decreased as the thickness increased. The thickness of IZO was one of vital factors in order to optimize overall pixel process for fabricating COA structure.

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Fabrication of nano pattern using the injection molding (사출성형을 이용한 미세 패턴 성형)

  • Lee, Kwan-Hee;Yoo, Yeong-Eun;Kim, Sun-Kyoung;Kim, Tae-Hoon;Je, Tae-Jin;Choi, Doo-Sun
    • Proceedings of the KSME Conference
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    • 2007.05a
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    • pp.1532-1536
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    • 2007
  • A plastic substrate with tiny rectangular pillars less than 100nm is injection molded to study pattern replication in injection molding. The size of the substrate is 50mm ${\times}$ 50mm and 1mm thick. The substrate has 9 patterned areas of which size is 2mm ${\times}$ 2mm respectively. The lengths of the pillars are 50nm, 100nm, 150nm and 200nm and the width and height are 50nm and about 100nm respectively. A pattern master is fabricated by e-beam writing using positive PR(photo resist) and then a nickel stamper replicated from the PR master by nickel electro-plating. Cr is deposited on the PR pattern master before nickel electro-plating as a conducting layer. Using this nickel stamper, several injection molding experiments are done to investigate effects of the injection molding parameters such as mold temperature, injection rate, packing pressure or pattern location on the replication of the patterns under 100nm.

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Improvement of Graphene's Electrical Properties by ICP Cleaning

  • Gang, Sa-Rang;Ra, Chang-Ho;Yu, Won-Jong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.629-629
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    • 2013
  • Graphene is a carbon based material and it has intriguing features, such as phenomenally strong, thin, flexible, transparent and conductive, those make it attractive for a broad range of applications.Unfortunately, graphene is extremely sensitive to contamination. When we fabricate graphene devices, electrical properties of graphene are altered [1], and the charge carrier mobility drops accordingly by orders of magnitude. This significant impact on electron mobility occurs because any surrounding medium could act as a dominant source of extrinsic scattering, which effectively reduces the mean free path of carriers [2,3]. The dominant contaminant is generated through fabrication stage by polymethyl methacrylate (PMMA) [4], or photo resist (PR). Surface contamination by these residues has long been a critical problem in probing graphene's intrinsic properties. If we clearly solve this problem, we can get highly performed graphene devices. Here, we will report on graphene cleaning process by Induced Coupled Plasma (ICP). We demonstrated how much decomposition of residue impact on improving electrical properties of graphene.

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The study of laser processing parameter for $\mu$-BGA cutting ($\mu$-BGA 절단을 위한 레이저 가공 파라미터 연구)

  • Baek, kwang-yeol;Lee, cheon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.652-655
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    • 2001
  • In this paper, I have studied minimization of the kerf-width and surface burning which are occurred after the singulation process of multi layer $\mu$-BGA( thickness 1.1 mm, 0.9 mm) with a pulsed Nd:YAG( = 532 nm, repetition rate = 10 Hz) laser. The thermal energy of a pulsed Nd:YAG laser is used to cut the copper layer. I have studied are minimization of the surface burning and kerf-width using a photo resist, $N_2$blowing and polyester double sided tape as a cutting parameter. The $N_2$blowing reduces a laser energy loss by debris and suppresses a surface carbonization. Also, I have studied characters of cutting with a choice of side of laser beam incidence. The SEM(Scanning Electron Microscope), non-contact 3D inspector and high-resolution microscope are used to measure kerf width and surface state. The optimum value of 1.1 mm $\mu$-BGA singulation is 524 $\mu$m that is reduced kerf width of 60 % with $N_2$blowing. And I obtained reduction of carbonization of 68 % with a polyester double side tape in 0.9 mm $\mu$-BGA. I used laser intensity of 1.91$\times$10$^{6}$ / $\textrm{cm}^2$ in this study.

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A Study on the High Efficiency PR Strip technology by using the Ozone Process (오존공정을 이용한 고효율 PR 제거기술 연구)

  • Son, Young-Su
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.1
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    • pp.22-27
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    • 2007
  • we have been studied on the realization of the boundary layer controlled ozone process and related facilities in order to apply for the photo-resist strip process in the semiconductor and flat panel display manufacturing. By means of developing the technology for the high concentration ozone production, it was possible to realized the boundary layer control ozone process by vapor. As a result of the silicon wafer PR strip test, we obtained the strip rate of about 400nm/min at the ozone concentration of 16wt% and flow rate of 8[liter/min.].

Simple fabrication process and characteristic of a screen-printed triode-CNT field emission arrays for the flat lamp application

  • Jung, Y.J.;Park, J.H.;Jeon, S.Y.;Park, S.J.;Alegaonkar, P.S.;Yoo, J.B.;Park, C.Y.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1214-1218
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    • 2006
  • We introduced simple fabrication process for field emission devices based on carbon nanotubes (CNTs) emitters. Instead of using the ITO material as a transparent electrode, a metal (Au) with thickness of 5-20nm was used. Moreover, the ITO patterning process was eliminated by depositing metal layer, before the CNT printing process. In addition, the thin metal layer on photo resist (PR) layer was used as UV block. We fabricated the CNT field emission arrays of triode structure with simple process. And I-V characteristics of field emission arrays were measured. The maximum current density of $254{\mu}A/cm2$ was achieved when the gate and the anode voltage was kept 150V and 3000V, respectively. The distance between anode and cathode was kept constant.

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2.22-inch qVGA ${\alpha}$-Si TFT-LCD Using a 2.5 um Fine-Patterning Technology by Wet Etch Process

  • Lee, J.B.;Park, S.;Heo, S.K.;You, C.K.;Min, H.K.;Kim, C.W.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2006.08a
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    • pp.1649-1652
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    • 2006
  • 2.22-inch qVGA $(240{\times}320)$ amorphous silicon thin film transistor liquid active matrix crystal display (${\alpha}$- Si TFT-AMLCD) panel has been successfully demonstrated employing a 2.5 um fine-patterning technology by a wet etch process. Higher resolution 2.22-inch qVGA LCD panel with an aperture ratio of 58% can be fabricated because the 2.5 um fine pattern formation technique is combined with high thermal photo-resist (PR) development. In addition, a novel concept of unique ${\alpha}$-Si TFT process architecture, which is advantageous in terms of reliability, was proposed in the fabrication of 2.22-inch qVGA LCD panel. Overall results show that the 2.5 um finepatterning is a considerably significant technology to obtain higher aperture ratio for higher resolution ${\alpha}$-Si TFT-LCD panel realization.

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Fabrication Method of 3D Feed Horn Shape MEMS Antenna Array Using MRPBI(Mirror Reflected Parallel Beam Illuminator) with Inclined X-Y-Z Stage (MRPBI를 이용한 3D Feed Horn Shape MEMS Antenna Array의 제조)

  • Park, Jong-Yeon;Kim, Kun-Tae;Moon, Sung;Pak, Jung-Ho;Park, Jong-Oh
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1914-1917
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    • 2001
  • 3D Feed Horn Shape MEMS Antenna Array는 적외선 이미지 소자 또는 Tera hertz band 등에서 많은 응용을 할 수 있는 장점을 가진 MEMS 구조체 이다. 하지만 일반적인 MEMS 공정을 이용해서 3D Feed Horn Shape MEMS antenna array를 구현하기는 적합하지 않았다. 본 논문에서는 마스크와 웨이퍼가 일체 된 형태의 경사된 척이 초 저속으로 회전하면서 노광을 할 수 있는 새로운 방식과 미러 반사구조를 이용해서 평행광을 얻을수 있는 노광장치 (MRPBI : Mirror Reflected Parallel Beam Illuminator) System제작방법을 제안하였다. 3D Feed Horn Shape MEMS Antenna의 구조적인 high apect ratio의 특성에 의해서 SU-8과 PMER Negative Photo resist를 이용한 기본적인 실험을 통해 3D 구조체의 구현 가능성을 증명하였다. 또한 Microbolometer의 성능향상을 위한 이론적인 3D MEMS Antenna Model들을 HFSS(High Frequency Structure Simulator)을 이용해서 그 최적구조를 제안하고 3D MEMS Antenna Gain 값을 비교 분석하였다.

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