• Journal of Power Electronics
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• v.19 no.1
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• pp.134-145
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• 2019

A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

• The Transactions of the Korean Institute of Power Electronics
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• v.15 no.1
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• pp.43-51
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• 2010

This paper proposes an analysis of voltage delay and compensation for current control in H-Bridge Multi-Level (HBML) inverters for a medium voltage motor drive with vector control. It is shown that the expansion and modularization capability of the HBML inverter is improved in case of using Phase-Shifted Pulse Width Modulation (PSPWM) since individual inverter modules operate more independently. But, the PSPWM of HBML has a phase difference between reference voltage and real voltage, which can cause instability in the current regulator at high speed where the ratio of the sampling frequency to the output frequency is insufficient. This instability of the current regulator is removed by adding a proposed method which compensate a phase difference between reference voltage and real voltage. The proposed method is suitable for HBML inverter controlled by PSPWM with low switching frequency and high speed motor drive. The validity of the proposed method is verified experimentally on 6,600[V] 1,400[kW] induction motor fed by an 13-level HBML inverter.

• Journal of Power Electronics
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• v.16 no.2
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• pp.512-521
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• 2016

Cascaded H-bridge multilevel (CHBML) inverters usually include a large number of isolated dc-voltage sources. Some faults in the dc-voltage sources result in unequal cell dc voltages. Unfortunately, the conventional phase-shifted carrier (PSC) PWM method that is widely used for CHBML inverters cannot eliminate low frequency sideband harmonics when the cell dc voltages are not equal. This paper analyzes the principle of sideband harmonic elimination, and proposes an improved PSCPWM that can eliminate low frequency sideband harmonics under the condition of unequal dc voltages. In order to calculate the carrier phases, it is necessary to solve transcendental equations for low frequency sideband harmonic elimination. Therefore, an approach based on the artificial bee colony (ABC) algorithm is presented in this paper. The proposed PSCPWM method enhances the reliability of CHBML inverters. The proposed PSCPWM is not limited to CHBML inverters. It can also be applied to other types of multilevel inverters. Simulation and experimental result obtained from a prototype CHBML inverter verify the theoretical analysis and the achievements made in this paper.

• Journal of Power Electronics
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• v.16 no.1
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• pp.163-172
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• 2016

The modular multilevel converter (MMC) has been receiving increased attentions in recent years. The new modular multilevel converter is a derivative topology from the traditional MMC in which the number of sub-modules (SMs) necessitated by each phase can be reduced by one. This paper presents a phase-shifted carrier pulse-width modulation (PSC-PWM) for the new MMC with an optimal phase-shifted angle to suppress the harmonics of the output voltage. Further, the harmonic features when the capacitor voltage of the middle SM is selected as two different values are also investigated. Moreover, in order to avoid introducing an unnecessary dc offset current at the ac terminals of the new MMC, a novel capacitor voltage balancing scheme is proposed by adjusting the amplitude of the reference signals rather than the offset. Finally, the validity and effectiveness of the proposed modulation and balancing schemes have been verified by experimental results based on a three-phase prototype of the new MMC.

• Journal of Power Electronics
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• v.16 no.4
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• pp.1336-1345
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• 2016

A modified space vector pulse width modulation (SVPWM) strategy based on vector space decomposition and its equivalent carrier-based PWM realization are proposed in this paper, which is suitable for six-phase asymmetrical dual stator induction machines (DSIMs). A DSIM is composed of two sets of symmetrical three-phase stator windings spatially shifted by 30 electrical degrees and a squirrel-cage type rotor. The proposed SVPWM technique can reduce torque ripples and suppress the harmonic currents flowing in the stator windings. Above all, the equivalent relationship between the proposed SVPWM technique and the carrier-based PWM technique has been demonstrated, which allows for easy implementation by a digital signal processor (DSP). Simulation and experimental results, carried out separately on a simulation system and a 3.0 kW DSIM prototype test bench, are presented and discussed.

• Journal of Power Electronics
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• v.16 no.2
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• pp.473-479
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• 2016

In this paper, the PSC PWM method is chosen as the optimal modulation method for a 20MW VSC HVDC, with consideration of the harmonic distortion of the output voltage, the switching frequency, and the control implementation difficulty. In addition, a new PSC PWM method is proposed in order to achieve an easy application and to solve the redundant control problems encountered in the previous PSC PWM method. To verify the proposed PSC PWM method, PSCAD/EMTDC simulations for an 11-level MMC RTDS HILS test and an 11-level MMC prototype converter test were performed. As can be seen from the results of these tests, the proposed PSC PWM method shows good results in an 11-level MMC with redundant sub-modules.

• Journal of Power Electronics
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• v.17 no.3
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• pp.653-663
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• 2017

Multilevel active neutral-point-clamped (ANPC) converter combines the advantages of three-level ANPC converter and multilevel flying capacitor (FC) converter. However, multilevel ANPC converter often suffers from capacitor voltage balancing problems. In order to solve the capacitor voltage balancing problems for five-level ANPC converter, phase-shifted pulse width modulation (PS-PWM) is used, which generally provides natural voltage balancing ability. However, the natural voltage balancing ability depends on the load conditions and converter parameters. In order to eliminate voltage deviations under steady-state and dynamic conditions, the active voltage-balancing control (AVBC) methods of floating capacitors and dc-link capacitors based on PS-PWM are proposed. First, the neutral-point current is regulated to balance the neutral-point voltage by injecting zero-sequence voltage. After that, the duty cycles of the redundant switch combinations are adjusted to balance the floating-capacitor voltages by introducing moderating variables for each of the phases. Finally, the effectiveness of the proposed AVBC methods is verified by experimental results.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.6
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• pp.526-534
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• 2022

The modular multilevel converter (MMC) has been widely applied to various industrial areas because of its various advantages and structural characteristics. Therefore, many methods for synthesizing the output voltage of MMC have been studied. Among these methods, phase-shifted pulse width modulation (PSPWM) is frequently used in MMC systems because it has diverse merits, such as excellent output qualities even with a small number of cells and uniform power distribution among cells. In this study, the total harmonic distortion (THD) of the output voltage is analyzed in accordance with the number of cells in one arm of a single-delta bridge cell MMC in order to compare PSPWM methods in terms of the THD of the output voltage. The physical characteristics of the triangle and sawtooth carrier waves used for the PSPWM and the mathematical modeling of output voltage are introduced. Then, the obtained results are verified through real-time simulation of a 1 MW single-delta bridge cell MMC system.

• Journal of Power Electronics
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• v.19 no.2
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• pp.475-486
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• 2019

This paper proposes the modulation and control of a three-to-six-phase matrix converter with an asymmetrical six-phase output. The matrix converter (MC) outputs consist of two sets of three-phase spatially shifted by $30^0$, where the two sets have two isolated neutrals. The space vector approach is considered for the modeling and subsequent modulation of the three-to-six phase MC. The intelligent selection of voltage space vectors is made to synthesize the reference voltages and to obtain a sinusoidal output. The dwell times of selected voltage space vectors are adjusted in such a way that the effect of the second and the third auxiliary plane vectors (i.e., x1-y1, and x2-y2) are nullified. To achieve the maximum output voltage gain and to ensure that no reactive power is drawn from the utility supply, the input side power factor is maintained at unity. Nevertheless, the source side power factor is controllable. The modulation technique is implemented in dSPACE working in conjunction with a FPGA. Hardware results that validate the proposed control algorithm are discussed.

• Journal of Power Electronics
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• v.18 no.4
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• pp.1140-1153
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• 2018

The harmonic impedance characteristic of a traction power supply system (TPSS) is necessary for taking actions to suppress the high-order harmonic resonances caused by AC electric locomotives. This paper proposes a controllable harmonic generating method (CHGM) for measuring the TPSS harmonic impedance by injecting harmonic disturbances of different frequencies and amplitudes into the TPSS. This method applies phase shifted pulse-width modulation (PSPWM) and ensures that the undesired sideband harmonics can be negligible while the desired harmonic is both controllable and adjustable. Multiple harmonics can be emitted at the same time. The implementation of the method is also presented. Simulations are carried out to validate the performance of the proposed method. Finally, experimental results on a 5 H-bridge converters platform verified the effectiveness and feasibility of the proposed method.