• Title/Summary/Keyword: Phase noise performance

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Noise-robust Phase Gradient Retrieval Formulation for Phase-shifting Interferometry

  • Park, Dae-Seo;O, Beom-Hoan;Park, Se-Geun;Lee, El-Hang;Park, Jae-Hyun;Lee, Seung-Gol
    • Journal of the Optical Society of Korea
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    • v.14 no.2
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    • pp.131-136
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    • 2010
  • Modification of the phase gradient formulation is proposed in order to make phase retrieval less susceptible to noise. The modified formulation is derived from separation of the phase terms and the intensity modulation terms of interferograms, and subsequent differentiation to reduce the noise-induced error of the phase gradient vector. Its performance is evaluated and compared to that of the conventional formulation, and noise-robust nature is confirmed.

A Design of OFDM Signal for Reducing the ICI Caused by Phase Noise (위상잡음에 의한 ICI를 제거하기 위한 OFDM 신호 설계)

  • Li Yingshan;Hieu Nguyen Thanh;Ryu Heung-Gyoon;Jeong Young-Hoo;Hahm Young-Kown
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.16 no.3 s.94
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    • pp.319-326
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    • 2005
  • In the multi-carrier OFDM communication system for the high data rate transmission, the ICI caused by phase noise of transceiver local oscillator may degrade the system performance seriously. In this paper, a new ICI self-cancellation scheme using data-conjugate method is proposed to reduce the ICI caused by phase noise effectively. Then, the CPE, ICI and CIR are derived by the phase noise linear approximation method. Besides, to analyze the efficiency of system performance improvement, the proposed method is compared with the original OFDM and the conventional ICI self-cancellation scheme using data-conversion method. As results, the performance degradation caused by ICI can be mitigated effectively in the OFDM system with ICI self-cancellation scheme, and more performance improvement can be achieved by the proposed ICI self-cancellation scheme using data-conjugate method than the conventional ICI self-cancellation scheme using data-conversion method when phase noise exists.

Analysis of Modified Digital Costas Loop Part II : Performance in the Presence of Noise (변형된 디지탈 Costas loop에 관한 연구 (II) 잡음이 있을 경우의 성능 해석)

  • 정해창;은종관
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.19 no.3
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    • pp.37-45
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    • 1982
  • This paper is a sequel of the Part I paper[1] on the modified digital Costas loop. In this Part II we analyze the performance of the system in the presence of noise. It is shown that, when the input signal is corrupted by additive white Gaussian noise, the noise process in the loop becomes Rician as a result of the tan-1 (.) function of the phase error detector. Steady state probability density functions of phase errors of the first-and second-order loops have been obtained by solving the Chapman-Kolmogorov equation numerically. Also, the mean and variance of phase error in the steady state have been obtained analytically, and are compared with the results obtained by computer simulation.

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A Comparative Study on the Performance of Two-Phase and Three-Phase Randomized Pulse Position PWM Scheme for Mitigation of Audible Switching Acoustic Noise in Motor Drives (모터 구동 장치의 가청 스위칭 소음 저감을 위한 2상 및 3상 랜덤 펄스 위치 PWM기법의 성능 비교)

  • 정영국;위석오;나석환;임영철
    • The Transactions of the Korean Institute of Power Electronics
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    • v.7 no.3
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    • pp.224-236
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    • 2002
  • In this paper, a comparative study on the performance of two-phase and three-phase randomized pulse position PWM scheme for mitigation of audible switching acoustic noise in motor drives is done. In the randomized Pulse Position PW, each of two-Phase or three-phase PWM Pulses is located randomly in each switching interval. Simulation and experimental efforts were executed to investigate the spread effects of Power spectra of inverter output voltage, waveforms of ripple current and audible switching acoustic noise. As results, two-phase RP% scheme is more effective from the viewpoint of switching loss and ease of implementation while the three-phase RPWM scheme is more effective from the viewpoint of the spread effects of power spectra. Also, from the view point of the audible switching acoustic noise in motor drives, two-phase and three-phase RPW schemes are nearly the same.

Design and Performance Evaluation of an Advanced CI/OFDM System for the Reduction of PAPR and ICI (PAPR과 ICI의 동시 저감을 위한 개선형 CI/OFDM 시스템 설계와 성능 평가)

  • Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.33 no.6A
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    • pp.583-591
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    • 2008
  • OFDM (orthogonal frequency division multiplexing) has serious problem of high PAPR (peak-to-average power ratio). Recently, CI/OFDM (carrier interferometry OFDM) system has been proposed for the low PAPR. However, CI/OFDM system shows another problem of ICI because of phase offset mismatch due to the phase noise. In this paper, to simultaneously reduce the PAPR and ICI effects, we propose an A-CI/OFDM (advanced-CT/OFDM). This method improves the BER performance by use of the margin of phase offset at CI codes. Propose system to reduce the effect the phase noise, even though it shows a little bit higher PAPR than conventional CI/OFDM, so we apply the PTS among the PAPR reduction techniques to proposed system to mitigate this problem. Therefore, it improves the total BER performance because the proposed method can decrease the effect of phase noise and get the gain in PAPR reduction performance. From the simulation results, we can show the performance comparison between the conventional OFDM, CI/OFDM and A-CI/OFDM.

Design and Fabrication of 0.5~4 GHz Low Phase Noise Frequency Synthesizer (낮은 위상잡음 특성을 갖는 0.5~4 GHz 주파수 합성기 설계 및 제작)

  • Park, Beom-Jun;Park, Dong-Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.26 no.3
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    • pp.333-341
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    • 2015
  • In this paper, a 0.5~4 GHz frequency synthesizer having good phase noise performance is proposed. Wideband output frequencies of the synthesizer were synthesized using DDS(Direct Digital Synthesizer) and analog direct frequency synthesis technology in order to obtain fast settling time. Also in order to get good phase noise performance, 2.4 GHz DDS clock was generated by VCO(Voltage Controlled Oscillator) which was locked by the 100 MHz reference oscillator using SPD(Sample Phase Detector). The phase noise performance of wideband frequency synthesizer was estimated and the results were compared with the measured ones. The measured phase noise of the frequency synthesizer was less then -121 dBc @ 100 kHz at 4 GHz.

A Stability-Secured Loop Bandwidth Controllable Frequency Synthesizer for Multi-Band Mobile DTV Tuners

  • Kim, Kyeong-Woo;Akram, Muhammad Abrar;Hwang, In-Chul
    • IEIE Transactions on Smart Processing and Computing
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    • v.4 no.3
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    • pp.141-144
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    • 2015
  • A broadband radio frequency synthesizer for multi-band, multi-standard mobile DTV tuners is proposed, it's loop bandwidth can be calibrated to optimize integrated phase noise performance without the problem of phase noise peaking. For this purpose, we proposed a new third-order scalable loop filter and a scalable charge pump circuit to minimize the variation in phase margin during calibration. The prototype phase-lock loop is fabricated in 180nm complementary metal-oxide semiconductor shows that it effectively prevents phase noise peaking from growing while the loop bandwidth increases by up to three times.

A Study on the Performance of a Modified Binary Quantized first-Order DPLL (2단 양자화기를 사용한 1차 DPLL의 성능 개선에 관한 연구)

  • 강치우;김진헌
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.21 no.3
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    • pp.6-12
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    • 1984
  • The basic binary quantized first-order digital phase locked loop (DPLL) is modified in order to reduce the aquisition time and steadyftate phase error. Adding the loop that corrects the phase difference by detecting the falling zero-crossing time, an effort for the improving the performance is performed and the performance compared with that of the basic DPLL. Using a graphical method, the phase locking processes of the modified DPLL for a phase step and a frequency step input are depicted visually in the absence of noise. The performance of the modified DPLL for a sinusoidal input added narrow band random noise is evaluated using the Chapman-Kolmogorov equation. This approach is verified by direct computer simulation. The steady-state phase error and the average aquisition time of the modified DPLL are compared with those of the basic DPLL, It is shown that the aquisition time of the modified DPLL is shortened about twice, also, as signal to noise ratio increases, the effect of the modification increases and the steady-state phase error approaches to zero.

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A 2.4 GHz Low-Noise Coupled Ring Oscillator with Quadrature Output for Sensor Networks (센서 네트워크를 위한 2.4 GHz 저잡음 커플드 링 발진기)

  • Shim, Jae Hoon
    • Journal of Sensor Science and Technology
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    • v.28 no.2
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    • pp.121-126
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    • 2019
  • The voltage-controlled oscillator is one of the fundamental building blocks that determine the signal quality and power consumption in RF transceivers for wireless sensor networks. Ring oscillators are attractive owing to their small form factor and multi-phase capability despite the relatively poor phase noise performance in comparison with LC oscillators. The phase noise of a ring oscillator can be improved by using a coupled structure that works at a lower frequency. This paper introduces a 2.4 GHz low-noise ring oscillator that consists of two 3-stage coupled ring oscillators. Each sub-oscillator operates at 800 MHz, and the multi-phase signals are combined to generate a 2.4 GHz quadrature output. The voltage-controlled ring oscillator designed in a 65-nm standard CMOS technology has a tuning range of 800 MHz and exhibits the phase noise of -104 dBc/Hz at 1 MHz offset. The power consumption is 13.3 mW from a 1.2 V supply voltage.

Adaptive Decision Feedback Equalizer Based on LDPC Code for the Phase Noise Suppression and Performance Improvement (위상잡음 제거와 성능향상을 위한 LDPC 부호 기반의 적응형 판정 궤환 등화기)

  • Kim, Do-Hoon;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.37 no.3A
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    • pp.179-187
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    • 2012
  • In this paper, we propose an adaptive DFE (Decision Feedback Equalizer) based on LDPC (Low Density Parity Check) code for phase noise suppression and performance improvement. The proposed equalizer in this paper is applied for wireless repeater system. So as to meet ever increasing requirements on higher wireless access data rate and better quality of service (QoS), the wireless repeater system has been studied. The echo channel and RF impairments such as phase noise produce performance degradation. In order to remove echo channel and phase noise, we suggest a novel adaptive DFE equalizer based on LDPC code. The proposed equalizer helps to compensate RF impairments and improve the performance significantly better than used independently. In addition, proposed equalizer has less iteration number of LDPC code. So, the proposed equalizer system has low complexity.