• Transactions on Electrical and Electronic Materials
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• 제15권1호
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• pp.37-40
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• 2014

A novel memory is reported, in which $Ge_2Sb_2Te_5$ (GST) has been used as a floating gate. The threshold voltage was shifted due to the phase transition of the GST layer, and the hysteretic behavior is opposite to that arising from charge trapping. Finite Element Modeling (FEM) was adapted, and a new simulation program was developed using c-interpreter, in order to analyze the small shift of threshold voltage. The results show that GST undergoes a partial phase transformation during the process of RESET or SET operation. A large $V_{TH}$ shift was observed when the thickness of the GST layer was scaled down from 50 nm to 25 nm. The novel 1 transistor PCM (1TPCM) can achieve a faster write time, maintaining a smaller cell size.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.181-182
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• 2011

Phase-change materials can be cycled by exposure to laser beam, and as a function of the pulse intensity and duration, the laser beam triggers the switching from crystalline to amorphous phase and back. In other to progress better crystallization transition and amorphization long phase-transformation data of phase-change memory (PRAM), we investigated about the effect of Sb doping and Ag ions percolating into Ge-Se-Te phase-change material. Doped Sb concentrations was determined each of 10, 20 and 30 wt%. As the Sb-doping concentration was increased, the resistivity decreased and the crystallization temperature increased. Ionization of Ag was progressed by DPSS laser (532 nm) for 1 hour. The resistivity was more decreased and the crystallization temperature was more increased in case of adding Ag layer under Sb-(Ge-Se-Te) thin film. At the every condition of thin films included Ag layer more stable states were indicated compare with just Sb-doped Ge-Se-Te thin films.

• 한국전기전자재료학회논문지
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• 제35권1호
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• pp.44-49
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• 2022

In this paper, we investigated current (I)- and voltage (V)-sweeping properties in a double-stack structure, Ge₂Sb₂Te₅/Ti/W-doped Ge₈Sb₂Te₁₁, a candidate medium for applications to multilevel phase-change memory. 200-nm-thick and W-doped Ge₂Sb₂Te₅ and W-doped Ge₈Sb₂Te₁₁ films were deposited on p-type Si(100) substrate using magnetron sputtering system, and the sheet resistance was measured using 4 point-probe method. The sheet resistance of amorphous-phase W-doped Ge₈Sb₂Te₁₁ film was about 1 order larger than that of Ge₂Sb₂Te₅ film. The I- and V-sweeping properties were measured using sourcemeter, pulse generator, and digital multimeter. The speed of amorphous-to-multilevel crystallization was evaluated from a graph of resistance vs. pulse duration (t) at a fixed applied voltage (12 V). All the double-stack cells exhibited a two-step phase change process with the multilevel memory states of high-middle-low resistance (HR-MR-LR). In particular, the stable MR state is required to guarantee the reliability of the multilevel phase-change memory. For the Ge₂Sb₂Te₅ (150 nm)/Ti (20 nm)/W-Ge₈Sb₂Te₁₁ (50 nm), the phase transformations of HR→MR and MR→LR were observed at t<30ns and t<65ns, respectively. We believe that a high speed and stable multilevel phase-change memory can be optimized by the double-stack structure of proper Ge-Sb-Te films separated by a barrier metal (Ti).

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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• pp.106-107
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• 2007

A detailed investigation of cell structure and electrical characteristic in chalcogenide-based phase-change random access memory(PRAM) devices is presented. We used compound of Ge-Se-Te material for phase-change cell. Actually, the performance properties have been improved surprisingly then conventional Ge-Sb-Te. However, crystallization time was as long as ever for amorphization time. We conducted this experiment in order to solve that problem by doping-Sb with annealing.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
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• pp.32-33
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• 2006

As next generation nonvolatile memory, chalcogenide-based phase change memory can substitute for a conventional flash memory from its high performance. Also, fast writing speed, low writing voltage, high sensing margin, low power consumption and repetition reliability over $10^{15}$ cycle shows its possibility. At our laboratory, we invented ${Ge_1}{Se_1}{Te_2}$ material to alternate with conventional ${Ge_2}{Sb_2}{Te_5}$ for improve its ability. We respect the ${Ge_1}{Se_1}{Te_2}$ material can be a solution for high power consumption problem and long time at 'set' performance. A conductivity experiment from variable temperature was performed to see reliability of repetition at read and write performance. Compare with conventional ${Ge_2}{Sb_2}{Te_5}$ material, these two materials are used as complex compound to get the finest parameter.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.330.1-330.1
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• 2014

개인용 노트북, 태블릿 PC, 핸드폰 기술 발전에 의해 언제 어디서나 데이터를 작성하고 기록하는 일들이 가능해졌다. 특히 cloud 시스템을 이용하여 데이터를 휴대기기에 직접 저장하지 않고 server에 기록하는 일들이 가능해짐에 따라 server 기기의 성능, server-room power 및 space 에 대한 관심이 증가하였다. Storage class memory (SCM) 이란 memory device와 storage device의 장점을 결합한 memory를 일컫는 기술로 현재 소형 디바이스 부분부터 점차 그 영역을 넓히고 있다. 그중 phase change material을 이용한 phase change memory (PCM) 기술이 가장 각광받고 있다. PCM의 경우 scaling됨에 의해 cell간의 열 간섭으로 인한 data 손실의 우려가 있어 cell의 면적을 최소화 하여 소자를 제작하여야 한다. 기존의 sputtering등의 PVD 방법으로는 한계가 있어 ALD 공정을 이용한 PCM에 대한 연구가 활발히 진행중이다. 특히 tellurium 원료기체로 silyl 화합물 [1]을 사용하여 주로 $Ge_2Sb_2Te_5$의 조성에 초점을 맞춰 진행되고 있으나, 세부 공정에 대한 기본적인 연구는 미비하다. 본 연구에서는 Ge-Sb-Te 3원계 박막을 형성하기 위한 Sb-Te 화합물의 증착 공정에 대한 연구를 수행하였다. 특히 원료기체로 Si이 없는 새로운 Te 원료기체를 이용하여 조성 조절을 하였고, 박막의 물성을 분석하였다. 또한 공정온도에 따른 박막의 물성 변화를 분석하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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• pp.210-213
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• 2004

The phase transition between amorphous and crystalline states in chalcogenide semiconductor films can controlled by electric pulses or pulsed laser beam; hence some chalcogenide semiconductor films can be applied to electrically write/erase nonvolatile memory devices, where the low conductive amorphous state and the high conductive crystalline state are assigned to binary states. Memory switching in chalcogenides is mostly a thermal process, which involves phase transformation from amorphous to crystalline state. The nonvolatile memory cells are composed of a simple sandwich (metal/chalcogenide/metal). It was formed that the threshold voltage depends on thickness, electrode distance, annealing time and temperature, respectively.

• 반도체디스플레이기술학회지
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• 제8권1호
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• pp.13-17
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• 2009

In PRAM applications, the devices can be made for both binary and multi-state storage. The ability to attain intermediate stages comes either from the fact that some chalcogenide materials can exist in configurations that range from completely amorphous to completely crystalline or from designing device structure such a way that mimics multiple phase chase phenomena in single cell. We have designed stack-structured phase change memory cell which operates as multi-state storage. Amorphous $Ge_xTe_{100-x}$ chalcogenide materials were stacked and a diffusion barrier was chosen for each stack layers. The device is operated by crystallizing each chalcogenide material as sequential manner from the bottom layer to the top layer. The amplitude of current pulse and the duration of pulse width was fixed and number of pulses were controlled to change overall resistance of the phase change memory cell. To optimize operational performance the thickness of each chalcogenide was controlled based on simulation results.

• 대한전기학회논문지:전기물성ㆍ응용부문C
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• 제55권6호
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• pp.297-301
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• 2006

In the present work, we investigate the characteristics of new composition material, chalcogenide $Ge_1Se_1Te_2$ material in order to overcome the problems of conventional PRAM devices. The Tc of $Ge_1Se_1Te_2$ bulk was measured $231.503^{\circ}C$ with DSC analysis. For static DC test mode, at low voltage, two different resistances are observed. depending on the crystalline state of the phase-change resistor. In the first sweep, the as-deposited amorphous $Ge_1Se_1Te_2$ showed very high resistance. However when it reached the threshold voltage(about 11.8 V), the electrical resistance of device was drastically reduced through the formation of an electrically conducting path. The phase transition between the low conductive amorphous state and the high conductive crystal]me state was caused by the set and reset pulses respectively which fed through electrical signal. Set pulse has 4.3 V. 200 ns. then sample resistance is $80\sim100{\Omega}$. Reset pulse has 8.6 V 80 ns, then the sample resistance is $50{\sim}100K{\Omega}$. For such high resistance ratio of $R_{reset}/R_{set}$, we can expect high sensing margin reading the recorded data. We have confirmed that phase change properties of $Ge_1Se_1Te_2$ materials are closely related with the structure through the experiment of self-heating layers.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2005년도 하계학술대회 논문집 Vol.6
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• pp.118-119
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• 2005

PRAM (Phase Change Random Access Memory) is well known to use reversible phase transition between amorphous (high resistance) and crystalline (low resistance) states of chalcogenide thin film by electrical Joule heating. In this paper, we introduce a stack-type PRAM device with a novel GST/TiAlN structures (GST and a heating layer of TiAlN), and report its electrical switching properties. XRD analysis result of GST thin film indicates that the crystallization of the GST film start at about $200^{\circ}C$. Electrical property results such as I-V & R-V show that the phase change switching operation between set and reset states is observed, as various input electrical sources are applied.