• Toxicological Research
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• v.12 no.2
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• pp.163-169
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• 1996

The focus of this study was to investigate the suitable analytical methods for measurement of sulfamerazine and its metabolite in shrimp hepatopancreas and tail tissue, in addition to the methods for the optimization of solid-phase extraction cartridge conditions and the elucidation of sulfamerazine concentrations in aqueous buffer using HPLC with UV and EC detectors. Compared with UV detector the EC detector appears to be 10 times more sensitive than that of the UV detector. After the shrimp was exposed to 10 ppm sulfamerazine, the accumulation levels of sulfamerazine and its metabolite in tail tissue, which is edible portion, were considerably lower than 0.1 ppm. The data indicate that sulfamerazine continues to be a candidate for use at levels of sulfamerazine concentration used in aquaculture of shrimp.

• Journal of IKEEE
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• v.17 no.4
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• pp.544-549
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• 2013

This paper describes a modified binary phase detector (Bang-Bang phase detector - BBPD) for jitter reduction in clock and data recovery (CDR) circuits. The proposed PD reduces ripples in the VCO control voltage resulting in reduced jitter for CDR circuits. A 2.5 Gbps CDR circuit with a proposed BBPD has been designed and verified using Dongbu $0.13{\mu}m$ CMOS technology. Simulation shows the CDR with proposed PD recovers data with peak-to-peak jitter of 10.96ps, rms jitter of 0.86ps, and consumes 16.9mW.

• ETRI Journal
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• v.34 no.2
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• pp.175-183
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• 2012

Conventional synchronization algorithms for impulse radio require high-speed sampling and a precise local clock. Here, a phase-locked loop (PLL) scheme is introduced to acquire and track periodical impulses. The proposed impulse PLL (iPLL) is analyzed under an ideal Gaussian noise channel and multipath environment. The timing synchronization can be recovered directly from the locked frequency and phase. To make full use of the high harmonics of the received impulses efficiently in synchronization, the switching phase detector is applied in iPLL. It is capable of obtaining higher loop gain without a rise in timing errors. In different environments, simulations verify our analysis and show about one-tenth of the root mean square errors of conventional impulse synchronizations. The developed iPLL prototype applied in a high-speed ultra-wideband transceiver shows its feasibility, low complexity, and high precision.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.3
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• pp.352-358
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• 2016

A 5-phase phase-locked loop (PLL) for USB2.0 applications was implemented by using an all-synthesis technique. The length of the time-to-digital converter for the fine phase detector was halved by the operation of a coarse phase detector that uses 5-phase clocks. The maximum time difference between the rising edges of two adjacent-phase clocks was 6 ps at 480 MHz. The PLL chip in a 65-nm process occupies $0.038mm^2$, consumes 4.8 mW at 1.2 V. The measured rms and peak-to-peak output jitters are 8.6 ps and 45 ps, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.11
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• pp.842-850
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• 2018

In this paper, the design and fabrication of a frequency-locked-loop(FLL) 5-GHz oscillator with a single resonator is presented. The proposed oscillator is the simplified version of the previous FLL oscillator with two separate resonators in the VCO and frequency detector. The resonator is commonly used in the VCO and frequency detector of the proposed oscillator configuration. The 5-GHz oscillator is implemented on the hetero-multilayer substrate composed of a Rogers' RO4350B laminate, which has excellent high-frequency performance, and the commercial FR4 three-layer substrate. The frequency locking occurs at approximately 5 GHz and has an output power of 3.8 dBm. The phase noise has a free-run VCO phase noise at frequencies above 1 kHz, and an FLL background noise at frequencies below 1 kHz. For this loop-filter, the phase noise showed an improvement of approximately 12 dB at the offset-frequency of 100 Hz.

• Journal of Satellite, Information and Communications
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• v.1 no.1
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• pp.59-64
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• 2006

The broadband power detector for power amplitude envelope detection of the direct-conversion Six-port output signal was designed and implemented in this paper. The power detector should be linearly operated to produce the linear amplitude and phase signal for input RF signals in required broadband frequency range. The power detector should be designed under conditions of matching circuit with low VSWR, which protect unbalanced phase signal from reflection signal due to mismatch between the output port of a six-port and the input port of a power detector. The designed power detectors, which were implemented in L-band with 50 ohm matching and Ku-band with multiple LC matching circuits and isolator, respectively, were analyzed in viewpoints of the utilization as a power detector of direct conversion Six-port. The dynamic range of designed power detectors were also measured and rvaluated as a power detector of Six-port circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.3
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• pp.193-196
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• 2001

For wide locking range, an analog delay locked loop (DLL) was designed with the selective phase inversion scheme and the variable number of delay elements. The number of delay elements was determined adaptively depending on the clock cycle time. During the analog fine locking stage, a self-initializing 3-state phase detector was used to avoid the initial state problem associated with the conventional 3-state phase detector. With these schemes, the locking range of analog DLL was increased by four times compared to the conventional scheme according to the simulation results.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.46-52
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• 2014

This paper presents a multiple gain controlled digital phase and frequency detector with a fast lock-time. Lock-time of the digital PLL can be significantly reduced by applying proposed adaptive gain control technique. A loop gain of the proposed digital PLL is controlled by three conditions that are very large phase difference between reference and feedback signal, small phase difference and before lock-state, and after lock-state. The simulation result shows that lock-time of the proposed multiple gain controlled digital PLL is 100 times faster than that of the conventional structure with unit gain mode.

• Journal of Navigation and Port Research
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• v.36 no.5
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• pp.371-378
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• 2012

This paper presents a timing recovery method using Gardner TED (Timing Error Detector) with a Peak Detector using Parabola Peak Interpolation in underwater acoustic communication. This method will have an eye to improve phase converge speed of timing recovery and reduced amount of Tx data. The OQPSK(Offset Quadrature Phase Shift Keying) modulation technique was considered. The proposed algorithm has faster recovery speed and more accurate than Gardner TED because the sampling values in the proposed algorithm are moved persistingly to maximum or minimum point using parabolic peak interpolation. when simulation performed using Preposed method, it improved BER (Bit Error Rate) performance about 23% And to evaluate the performances of the proposed algorithm the sea trial was performed in the Korean East Sea. And distance of a transmitter-receiver is 3 km each other. As a result, the proposed algorithm outperforms better BER performance about 20% of timing recovery than the Gardner method. Also Proposed method improved converge speed of timing recovery about 1.4 times better than Gardner method.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2006.05a
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• pp.615-618
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• 2006

The broadband power detector for direct- onversion Six-port output circuit was designed and implementaed in this paper. The power detector should linearly operated to produce the linear amplitude and phase signal fer input RF signal in required broadband. So, the power detector should be designed under conditions of matching circuit with low VSWR. The designed power detectors, which were implemented in L-band with 50 ohm matching and Ku-band with matching circuit and isolator, respectively, were evaluated in the performances.