• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.5
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• pp.345-350
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• 2011

This paper was carried about optimization for high efficiency of point contact solar cell. We have studied on the characteristics of power converter according to each parameter for the optimization for high efficiency of point contact solar cell on this study. We have 25.1352% of convert efficiency after adapt optimal parameters as mentioned in point body and superior conclusion is drawn by comparison with general efficiency has within 20%. At this time, the value of parameter is 100 um cell pitch, 0.01 um AR coating, 0.9 um N+ FSF thickness., etc. This study will continue to go on for optimization for efficiency in future, as it looks now, the results of this study would contribute to the business of high efficiency of point contact solar cell.

• Proceedings of the KIEE Conference
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• 1998.11c
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• pp.729-731
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• 1998

Surface passivation using glass powders results in good reliability for high voltage silicon power devices. In this paper, Zinc borosilicate glass was prepared for the purpose of passivating, and a deposition technique of glass films on the silicon surface by electrophoresis in which acetone is used as a suspension medium and a measurement technique of C-V curve has been investigated. Properties were compared using SEM, XRD, C-V Curve as a function of firing condition, temperature and atmosphere were investigated. Under 100V applied, 1 minute, $700^{\circ}C$ firing temperature, and $O_2$ atmosphere, I can get the fine films $5.8{\mu}m$ thickness with Zinc borosilicate glass. As a result of investigation of glass films, it has been found that pre-firing and annealing play an important role to achieve uniform, fine, reliable glass deposition films and Glass/Silicon interlace.

• Journal of Industrial Technology
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• v.19
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• pp.101-105
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• 1999

Ultra thin $Ta_2O_5$ gate dielectrics were prepared by RTMOCVD (rapid thermal metal organic chemical vapor deposition) using Ta source $TaC_{12}H_{30}O_5N$ and $O_2$ gaseous mixtures. As a result, $Ta_2O_5$ thin films showed significantly low leakage current compared to $SiO_2$ of identical thickness, which was due to the stabilization of the interfacial layer by NO ($SiO_xN_y$) passivation layer. The conduction of leakage current in $Ta_2O_5$ thin films was described by the hopping mechanism of Poole-Frenkel (PF) type.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.44 no.4
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• pp.490-495
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• 1995

A bipolar junction transistor which exihibits 1000V breakdown voltage is designed and fabricated using FLR (Field Limiting Rings). Three dimensional effects on the breakdown voltage is investigated in the cylindrical coordinate and the simulation results are compared with the results in the rectangular coordinate. Breakdown voltage of the device with 3 FLR is simulated to be 1420V in the cylindrical coordinate while it is 1580V in rectangular coordinate. Bipolar junction transistor has been fabricated using the epitaxial wafer of which resistivity is 86 .OMEGA.cm and thickness is 105 .mu.m. Si$_{3}$N$_{4}$ and glass are employed for the passivation. Breakdown of the fabricated device is measured to be 1442V which shows better greement with the simulation results in cylindrical coordination.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.11a
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• pp.362-365
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• 1999

This paper describes on thinning SDB SOI substrates by SDB technology and electrochemical etch-stop. The surface of the fabricated SDB SOI substrates is more uniform than that grinding or polishing by mechanical method, and this process is possible to accurate SOI thickness control. During Electrochemical etch-stop, leakage current versus voltage curves were measured for analysis of the open current potential (OCP) point and the passivation potential (PP) poin and determinated to anodic substrates were analyzed by using AFM and SEM, respectivelv.

• Journal of the Korean Ceramic Society
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• v.34 no.3
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• pp.225-232
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• 1997

The performance characteristics of high rate discharge LiSOCl2 cells are highly affected by carbon cathode. During the cell discharge, SOCl2 reduction takes place at the porous carbon cathode, resulting in the precipitation of reaction products, mainly LiCl, within the pores of the substrate. This leads to eventual passivation of the cathode surface and resulting cell failure. To improve the cathode performance, we ex-amined discharge reactions of cathodes (half-cell, 50 mA/$\textrm{cm}^2$ constant current) with various surface density and thickness. The carbon cathode with the optimum capacity for our application is surface density 0.04 g/$\textrm{cm}^2$ and thickness 1.4mm carbon. The carbon cathode with surface density 0.04g/$\textrm{cm}^2$ and thickness 1.4 mm exhibits decreased polarization, increased discharge duration time and capacity (Ah/$\textrm{cm}^2$) as compared with that with surface density 0.04g/$\textrm{cm}^2$ and thickness 0.8mm. The porosities analyses on the two carbon cathodes show that total pore volume of the carbon cathode with thickness 1.4 mm is larger than that with thickness 0.8mm. The increased volume of mesopores (0.05$\mu$m~0.5$\mu$m) and macropores(>0.5$\mu$m) is ob-served with the carbon cathode with thickness 1.4mm as compared with that with thickness 0.8mm, which can be related with the observed capacity increase. We observed LiCl crystals, cubic crystallites and fused, plate-like aggregates, and some elemental S as discharge products by EDS and XRD.

• Journal of Electrochemical Science and Technology
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• v.10 no.4
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• pp.424-432
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• 2019

Planar BiVO₄ and 3 wt% Mo-doped BiVO₄ (abbreviated as Mo:BiVO₄) film were prepared by the facile spin-coating method on fluorine doped SnO₂(FTO) substrate in the same precursor solution including the Mo precursor in Mo:BiVO₄ film. After annealing at a high temperature of 450℃ for 30 min to improve crystallinity, the films exhibited the monoclinic crystalline phase and nanoporous architecture. Both films showed no remarkably discrepancy in crystalline or morphological properties. To investigate the effect of surface passivation exploring the Al₂O₃ layer, the ultra-thin Al₂O₃ layer with a thickness of approximately 2 nm was deposited on BiVO₄ film using the atomic layer deposition (ALD) method. No distinct morphological modification was observed for all prepared BiVO₄ and Mo:BiVO₄ films. Only slightly reduced nanopores were observed. Although both samples showed some reduction of light absorption in the visible wavelength after coating of Al₂O₃ layer, the Al₂O₃ coated BiVO₄ (Al₂O₃/BiVO₄) film exhibited enhanced photoelectrochemical performance in 0.5 M Na₂SO₄ solution (pH 6.5), having higher photocurrent density (0.91 mA/㎠ at 1.23 V vs. reversible hydrogen electrode (RHE), briefly abbreviated as V_RHE) than BiVO₄ film (0.12 mA/㎠ at 1.23 V_RHE). Moreover, Al₂O₃ coating on the Mo:BiVO₄ film exhibited more enhanced photocurrent density (1.5 mA/㎠ at 1.23 V_RHE) than the Mo:BiVO₄ film (0.86 mA/㎠ at 1.23 V_RHE). To examine the reasons, capacitance measurement and Mott-Schottky analysis were conducted, revealing that the significant degradation of capacitance value was observed in both BiVO₄ film and Al₂O₃/Mo:BiVO₄ film, probably due to degraded capacitance by surface passivation. Furthermore, the flat-band potential (V_FB) was negatively shifted to about 200 mV while the electronic conductivities were enhanced by Al₂O₃ coating in both samples, contributing to the advancement of PEC performance by ultra-thin Al₂O₃ layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.35 no.6
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• pp.603-609
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• 2022

Passivation quality is mainly governed by epitaxial growth of crystalline silicon wafer surface. Void-rich intrinsic a-Si:H interfacial layer could offer higher resistivity of the c-Si surface and hence a better device efficiency as well. To reduce the resistivity of the contact area, a modification of void-rich intrinsic layer of a-Si:H towards more ordered state with a higher density is adopted by adapting its thickness and reducing its series resistance significantly, but it slightly decreases passivation quality. Higher resistance is not dominated by asymmetric effects like different band offsets for electrons or holes. In this study, multilayer of intrinsic a-Si:H layers were used. The first one with a void-rich was a-Si:H(I₁) and the next one a-SiO_x:H(I₂) were used, where a-SiO_x:H(I₂) had relatively larger band gap of ~2.07 eV than that of a-Si:H (I₁). Using a-SiO_x:H as I₂ layer was expected to increase transparency, which could lead to an easy carrier transport. Also, higher implied voltage than the conventional structure was expected. This means that the a-SiO_x:H could be a promising material for a high-quality passivation of c-Si. In addition, the i-a-SiO_x:H microstructure can help the carrier transportation through tunneling and thermal emission.

• Korean Journal of Materials Research
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• v.5 no.6
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• pp.650-656
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• 1995

High frequency SAW filters for cellular communications were fabricated by metallizing 36$^{\circ}$Y-X LiTaO$_3$piezoelectric substrate with IIDT type electrodes. It was found that the center frequency of the filter was lowered than as designed. In order to overcome such a drawback and enable a fine tuning of its center frequency, dielectric SiN$_{x}$ thin films were deposited on LiTaO$_3$substrate by PECVD as passivation layer and then frequency responses were also characterized. As a result, the center frequency of the filter could be shifted to a higher frequency with increasing the thickness of SiN$_{x}$ film, because SAW velocity increased with increasing the ratio of the thickness of dielectric thin film to wavelength. The insertion loss of the filter, however, became larger with increasing the thickness of SiN$_{x}$ film.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.26 no.1
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• pp.73-79
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• 2013

Crystalline silicon solar cells with $SiN_x/SiN_x$ and $SiN_x/SiO_x$ double layer anti-reflection coatings(ARC) were studied in this paper. Optimizing passivation effect and optical properties of $SiN_x$ and $SiO_x$ layer deposited by PECVD was performed prior to double layer application. When the refractive index (n) of silicon nitride was varied in range of 1.9~2.3, silicon wafer deposited with silicon nitride layer of 80 nm thickness and n= 2.2 showed the effective lifetime of $1,370{\mu}m$. Silicon nitride with n= 1.9 had the smallest extinction coefficient among these conditions. Silicon oxide layer with 110 nm thickness and n= 1.46 showed the extinction coefficient spectrum near to zero in the 300~1,100 nm region, similar to silicon nitride with n= 1.9. Thus silicon nitride with n= 1.9 and silicon oxide with n= 1.46 would be proper as the upper ARC layer with low extinction coefficient, and silicon nitride with n=2.2 as the lower layer with good passivation effect. As a result, the double layer AR coated silicon wafer showed lower surface reflection and so more light absorption, compared with $SiN_x$ single layer. With the completed solar cell with $SiN_x/SiN_x$ of n= 2.2/1.9 and $SiN_x/SiO_x$ of n= 2.2/1.46, the electrical characteristics was improved as ${\Delta}V_{oc}$= 3.7 mV, ${\Delta}_{sc}=0.11mA/cm^2$ and ${\Delta}V_{oc}$=5.2 mV, ${\Delta}J_{sc}=0.23mA/cm^2$, respectively. It led to the efficiency improvement as 0.1% and 0.23%.