• Title/Summary/Keyword: Passivation Layer

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Dielectric and Passivation-Related Properties of Pecvd PSG (PECVD PSG의 유전 및 보호막특성에 관한 연구)

  • 유현규;강영일
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.22 no.2
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    • pp.90-96
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    • 1985
  • The properties of plasma-enhanced CVD phosphorous silicate glass (PECVD PSG) for passivation layer are studied . Phosphorous contentration was analyzed with X-ray fluores-cence. As a result, PECVD PSG has a limiting phosphors concentration of about 8 mole%. Curves relating to etcll rate, infrared absorption ratio, and sheet resistivity were adapted to monitor phosphorous concentration indirectly Dielectric properties, step coverage, crack resistance, and gettering effect are discussed in both of atmospheric pressure CVD (APCVO) and PECVD oxide. PECVD SiO2 film have density of about 2.4 g/㎤ at deposition rate of 450$\AA$/min, refractive index of about 1.53, and breakdown at fields of II-13 MV/cm. Crack resistance of PECVD oxide is greater than APCVD oxide. PECVD PSG films contained with 2 mole % phosphorous show good step coverage and gettering ability. The obtained results show more advantages in PECVD PSG than in APCVD PSG for device passivation.

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Optimum Design of Bonding Pads for Prevention of Passivation Damage in Semiconductor Devices Utilizing Lead-on-Chip (LOC) Die Attach Technique (리드 온 칩 패키징 기술을 이용하여 조립된 반도체 제품에서 패시베이션 파손을 막기 위한 본딩패드의 합리적 설계)

  • Lee, Seong-Min;Kim, Chong-Bum
    • Journal of the Microelectronics and Packaging Society
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    • v.15 no.2
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    • pp.69-73
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    • 2008
  • This article shows that the susceptibility of the device pattern to thermal stress-induced damage has a strong dependence on its proximity to the device comer in semiconductor devices utilizing lead-on-chip (LOC) die attach technique. The result, as explained based on numerical calculation and experiment, indicateds that the stress-driven damage potential of the passivation layer is the highest at the device comer. Thus, the bonding pads, which are very susceptible to passivation damage, should be designed to be located along the central region rather than the peripheral region of the device.

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Characterization of Backside Passivation Process for Through Silicon via Wafer (TSV 웨이퍼 공정용 Si3N4 후막 스트레스에 대한 공정특성 분석)

  • Kang, Dong Hyun;Gu, Jung Mo;Ko, Young-Don;Hong, Sang Jeen
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.3
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    • pp.137-140
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    • 2014
  • With the recent advent of through silicon via (TSV) technology, wafer level-TSV interconnection become feasible in high volume manufacturing. To increase the manufacturing productivity, it is required to develop equipment for backside passivation layer deposition for TSV wafer bonding process with high deposition rate and low film stress. In this research, we investigated the relationship between process parameters and the induced wafer stress of PECVD silicon nitride film on 300 mm wafers employing statistical and artificial intelligence modeling. We found that the film stress increases with increased RF power, but the pressure has inversely proportional to the stress. It is also observed that no significant stress change is observed when the gas flow rate is low.

Studies for Improvement in SiO2 Film Property for Thin Film Transistor (박막트랜지스터 응용을 위한 SiO2 박막 특성 연구)

  • Seo, Chang-Ki;Shim, Myung-Suk;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.17 no.6
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    • pp.580-585
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    • 2004
  • Silicon dioxide (SiO$_2$) is widely used as a gate dielectric material for thin film transistors (TFT) and semiconductor devices. In this paper, SiO$_2$ films were grown by APCVD(Atmospheric Pressure chemical vapor deposition) at the high temperature. Experimental investigations were carried out as a function of $O_2$ gas flow ratios from 0 to 200 1pm. This article presents the SiO$_2$ gate dielectric studies in terms of deposition rate, refrative index, FT-IR, C-V for the gate dielectric layer of thin film transistor applications. We also study defect passivation technique for improvement interface or surface properties in thin films. Our passivation technique is Forming Gas Annealing treatment. FGA acts passivation of interface and surface impurity or defects in SiO$_2$ film. We used RTP system for FGA and gained results that reduced surface fixed charge and trap density of midgap value.

Si wafer passivation with amorphous Si:H evaluated by QSSPC method (비정질 실리콘 증착에 의한 실리콘 웨이퍼 패시베이션)

  • Kim, Sang-Kyun;Lee, Jeong-Chul;Dutta, Viresh;Park, S.J.;Yoon, Kyung-Hoon
    • 한국신재생에너지학회:학술대회논문집
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    • 2006.06a
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    • pp.214-217
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    • 2006
  • p-type 비정질 실리콘 에미터와 n-type 실리콘 기판의 계면에 intrinsic 비정질 실리콘을 증착함으로써 계면의 재결합을 억제하여 20%가 넘는 효율을 보이는 이종접합 태양전지가 Sanyo에 의해 처음 제시된 후 intrinsic layer에 대한 연구가 많이 진행되어 왔다. 하지만 p-type wafer의 경우는 n-type에 비해 intrinsic buffer의 효과가 미미하거나 오히려 특성을 저하시킨다는 보고가 있으며 그 이유로는 minority carrier에 대한 barrier가 상대적으로 낮다는 것과 partial epitaxy가 발생하기 때문으로 알려져 있다. 본 연구에서는 partial epitaxy를 억제하기 위한 방법으로 증착 온도를 낮추고 QSSPC를 사용하여 minority carrier lifetime을 측정함으로써 각 온도에 따른 passivation 특성을 평가하였다. 또한 SiH4에 H2를 섞어서 증착하였을 경우 각 dilution ratio(H2 flow/SiH4 flow)에서의 passivation 특성 또한 평가하였다. 기판 온도 $100^{\circ}C$에서 증착된 샘플의 lifetime이 가장 길었으며 그 이하와 이상에서는 lifetime이 감소하는 경향을 보였다 낮은 온도에서는 박막 자체의 결함이 증가하였기 때문이며 높은 온도에서는 partial epitaxy의 영향으로 추정된다. H2 dilution을 하여 증착한 샘플의 경우 SiH4만 가지고 증착한 샘플보다 훨씬 높은 lifetime을 가졌다 이 또한 박막 FT-IR결과로부터 H2 dilution을 한 경우 compact한 박막이 형성되는 것을 확인할 수 있었는데 radical mobility 증가에 의한 박막 특성 향상이 원인으로 생각된다.

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Electrical Properties and Reliability of the Photo-conductive CdS Thin Films for Flexible Opto-electronic Device Applications (유연성 광전도 CdS 박막의 증착조건에 따른 전기적 특성 및 신뢰성 평가 연구)

  • Hur, Sung-Gi;Cho, Hyun-Jin;Park, Kyoung-Woo;Ahn, Jun-Ku;Yoon, Soon-Gil
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.12
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    • pp.1023-1027
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    • 2009
  • Cadmium sulfide (CdS) thin film for flexible optical device applications were prepared at $H_2/(Ar+H_2)$ flow ratios on polyethersulfon (PES) flexible polymer substrates at room temperature by radio frequency magnetron sputtering technique. The CdS thin films deposited at room temperature showed a (002) preferred orientation and the smooth surface morphologies. Films deposited at a hydrogen flow ratio of 25% exhibited a photo- and dark-sheet resistance of about 50 and $2.7\;{\times}\;10^5\;{\Omega}/square$, respectively. From the result of the bending test, CdS films exhibit a strong adhesion with the PES polymer substrates and the $Al_2O_3$ passivation layer deposited on the CdS films only shows an increase of the resistance of 8.4% after exposure for 120 h in air atmosphere.

The electrical and corrosion properties of polyphenylene sulfide/carbon composite coated stainless steel bipolar plate for PEM fuel cell

  • Lee, Yang-Bok;Kim, Kyung-Min;Park, Yu-Chun;Hwang, Eun-Ji;Lim, Dae-Soon
    • 한국신재생에너지학회:학술대회논문집
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    • 2011.05a
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    • pp.89.2-89.2
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    • 2011
  • Stainless steel bipolar plates have many advantage such as high electrical conductivity and mechanical strength and low fabrication cost. However, they need a passivation layer due to low corrosion resistance under PEM fuel cell operation condition. In this study, polyphenyene sulfide(PPS)/carbon composite coated stainless steel bipolar plates were fabricated by compression molding method after PPS/carbon composite sprayed on the stainless steel plate. PPS and carbon were chosen as the binder and conductive filler of passivation layer, respectively. The interfacial contact resistance and corrosion resistance of PPS/carbon composite coated stainless steel bipolar plates were investigated and compared to the stainless steel. The PPS/carbon composite coated stainless steel compared to stainless steel was improved interfacial contact resistance. The results of the potentiodynamic and potentiostatic measurements also showed that the PPS/carbon composite coated stainless steel did not corroded under PEM fuel cell operating conditions.

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Local Back Contact Formed by Screen Printing and Atomic Layer Deposited Al2O3 for Silicon Solar Cell

  • Jo, Yeong-Jun;Jang, Hyo-Sik
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.687-687
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    • 2013
  • In rearpoint contact solar cell and the PERC (passivated emitter rear contact) type cell, surfaces were passivated by SiO2 or Al2O3 to increase solar cell efficiency. Therefore, we have investigated the effect of surface passivation for crystalline silicon solarcell using mass-production atomic layer deposited (ALD) Al2O3. The patttern which consists of cylinders with 100um diameter and 5um height was formed by PR patterning on Si (100) substrate and then Al2O3 of about 10nm and 20nm thickness was deposited by ALD. The pattern in 10 nm Al2O3 film was removed by dipping in aceton solution for about 10 min but the pattern in 20 nm Al2O3 film was not. The influences of process temperature and heat treatment were investigated using microwave photoconductance decay (PCD) and Quasi-Steady-State photoconductance (QSSPC). The solar cell process used in this work combines the advantage of using the applicability of a selective deposition associated with a ALD passivation and the use of low-cost screen print for the contacts formation.

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Anode 물질 변화에 따른 Anode 표면 및 구리전착막의 특성분석

  • Choe, Eun-Hye;No, Sang-Su;Samuel, T.K.;Yun, Jae-Sik;Jo, Yang-Rae;Na, Sa-Gyun;Lee, Yeon-Seung
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.02a
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    • pp.261-261
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    • 2012
  • 반도체 공정에서 단위소자의 고속화를 구현하기 위한 금속배선공정에 사용되는 금속재료가 최근에 Al에서 구리로 전환됨에 따라, 향후에는 모든 디바이스가 구리를 주요 배선재료로 사용할 것으로 예측되고 있다. 이러한 구리 배선재료의 도입은 미세화와 박막화라는 관점에서 습식 방법임에도 불구하고 전기도금 방법이 반도체 구리 배선공정에 적용되는 획기적인 변화를 이끌어냈다. 이에 전기도금 방법으로 생산된 구리박막에 대한 요구사항이 증가되고 있다. 전기도금으로 구리박막을 성장시킴에 있어 도금 전해액, 유기첨가제, Anode 물질의 변화는 전착된 구리 박막의 미세구조 및 화학적 구조와 전착률, 비저항 등의 물리적 전기적 특성을 다양하게 변화시킬 수 있다. 본 연구에서는 Anode 물질 변화에 따라 Anode 표면에 형성된 불순물막(Passivation layer) 및 전착된 구리박막의 특성을 조사하였다. Anode는 soluble type과 insoluble type으로 나누어 실험을 진행하였다. Anode 물질 변화에 따른, 구리 박막의 물리적 특성을 조사하기 위하여 XPS (X-ray Photoelectron Spectroscopy)로 화학조성 및 불순물에 대해 분석하였다. 그리고 FE-SEM (Field Emission Scanning Electron Microscope)를 이용하여 전착박막의 두께를 조사 하고 AFM (Atomic Force Microscope)을 이용하여 표면 거칠기를 측정하였다. 또한 전기적 특성을 조사하기 위해 4-point probe를 사용하여 구리 전착박막의 표면저항(sheet resistance)을 측정하였다.

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Effective Oxygen-Defect Passivation in ZnO Thin Films Prepared by Atomic Layer Deposition Using Hydrogen Peroxide

  • Wang, Yue;Kang, Kyung-Mun;Kim, Minjae;Park, Hyung-Ho
    • Journal of the Korean Ceramic Society
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    • v.56 no.3
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    • pp.302-307
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    • 2019
  • The intrinsic oxygen-vacancy defects in ZnO have prevented the preparation of p-type ZnO with high carrier concentration. Therefore, in this work, the effect of the concentration of H2O2 (used as an oxygen source) on the oxygen-vacancy concentration in ZnO prepared by atomic layer deposition was investigated. The results indicated that the oxygen-vacancy concentration in the ZnO film decreased by the oxygen-rich growth conditions when using H2O2 as the oxygen precursor instead of a conventional oxygen source such as H2O. The suppression of oxygen vacancies decreased the carrier concentration and increased the resistivity. Moreover, the growth orientation changed to the (002) plane, from the combined (100) and (002) planes, with the increase in H2O2 concentration. The passivation of oxygen-vacancy defects in ZnO can contribute to the preparation of p-type ZnO.