• 제목/요약/키워드: Parallel-circuit line

검색결과 125건 처리시간 0.021초

B.B.D.를 이용한 콤필터 뱅크회로에 관한 연구 (A Study on a Comb Filter Bank Circuit using B.B.D.)

  • 이광형
    • 한국통신학회논문지
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    • 제7권4호
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    • pp.156-160
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    • 1982
  • A Comb Filter(C.F.) is constucted with a N-stages one-dimensional B.B.D.(Bucket-Brigade Device) delay line. One channel of the B.P.F. (Band Pass Filter) Bank is experimented, which includes a R.F.(Recursie Filter) using S/H circuits cascaded to the C.F. This algorithm of the C.F.B.(Comb Filter Bank) becomes the parallel spectrum analyzer circuit. The algorithm has less number of multiplication than that of FFT and improves the SNR.

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리플전압을 이용한 병렬아크 사고 감지기 개발 (Development of Parallel Arc Fault Detector Using Ripple Voltage)

  • 최정규;곽동걸
    • 전력전자학회논문지
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    • 제21권5호
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    • pp.453-456
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    • 2016
  • The major causes of electrical fire in low-voltage distribution lines are classified into short-circuit fault, overload fault, electric leakage, and electric contact failure. The special principal factor of the fire is electric arc or spark accompanied with such electric faults. This paper studies the development of an electric fire prevention system with detection and alarm of that in case of parallel arc fault occurrence in low-voltage distribution lines. The proposed system is designed on algorithm sensing the instantaneous voltage drop of line voltage at arc fault occurrence. The proposed detector has characteristics of high-speed operation responsibility and superior system reliability from composition using a large number of semiconductor devices. A new sensing control method that shows the detection of parallel arc fault is sensed to ripple voltage drop through a diode bridge full-wave rectifier at electrical accident occurrence. Some experimental tests of the proposed system also confirm the practicality and validity of the analytical results.

강유전체 위상 변위기를 위한 Reactive Circuit 설계 및 구현 (Design and Implementation of Reactive Circuit for Ferroelectric Phase Shifter)

  • 김영태;문승언;이수재;김선형;박준석;조홍구
    • 한국정보통신설비학회:학술대회논문집
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    • 한국정보통신설비학회 2003년도 하계학술대회
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    • pp.286-288
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    • 2003
  • In this paper, in order to obtain a large differential phase shift with a little change in applied voltage, a ferroelectric reflective load circuit has been designed on top of barium strontium titanate $(Ba,Sr)TiO_3$ [BST] thin film. The design of the ferroelectric reflection-type phase shifter is based on a reflection theory of terminating circuit, which has a reflection-type analogue phase shifter with two ports terminated in symmetric phase-controllable reflective networks. To achieve large amounts of phase shift in low bias-voltage range, the effects of change of capacitance and transmission line connected with two coupled ports of a 3-dB $90^{\circ}$ branch-line hybrid coupler have been investigated. A large phase shift with a small capacitance change in the parallel terminating circuit has been demonstrated in the paper.

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외부 전자파 펄스에 의해 전송선로에 유기되는 과전류 및 과전압 보호회로의 해석 (Analysis of Protection Circuits of Overcurent and Overvoltage on Transmission Line Induced by External Electromagnetic Pulse)

  • 하헌태;김세윤;이경재;오명환
    • 전자공학회논문지A
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    • 제28A권1호
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    • pp.8-14
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    • 1991
  • A new algorithm for calculation of overcurrent and overvoltage at load for parallel two-wire transmission line with nonlinear protection circuits induced by and external electromagnetic pulse is suggested. The rigorous solution is obtained for a particular type of the incident waveform and protection circuit. The validity of our algorithm is checked by comparing numerical results to the analytic solution in the particular case.

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Electronic Ballast Using a Symmetrical Half-bridge Inverter Operating at Unity-Power-factor and High Efficiency

  • Suryawanshi Hiralal M.;Borghate Vijay B.;Ramteke Manojkumar R.;Thakre Krishna L.
    • Journal of Power Electronics
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    • 제6권4호
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    • pp.330-339
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    • 2006
  • This paper deals with novel electronic ballast based on single-stage power processing topology using a symmetrical half-bridge inverter and current injection circuit. The half-bridge inverter drives the output parallel resonant circuit and injects current through the power factor correction (PFC) circuit. Because of high frequency current injection and high frequency modulated voltage, the proposed circuit maintains the unity power factor (UPF) with low THD even under wide variation in ac input voltage. This circuit needs minimum and lower sized components to achieve the UPF and high efficiency. This leads to an increase in reliability of ballast at low cost. Furthermore, to reduce cost, the electronic ballast is designed for two series-connected fluorescent lamps (FL). The analysis and experimental results are presented for ($2{\times}36$ Watt) fluorescent lamps operating at 50 kHz switching frequency and input line voltage (230 V, 50 Hz).

해상 VHF 모뎀의 송신전력 모니터링을 위한 결합기 및 정류회로 설계 (Design of Coupling and Rectifying Circuit for Monitoring of Transmitting Power of Maritime VHF Modem)

  • 김승근;성소영;임용곤;박동국
    • 한국정보통신학회논문지
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    • 제14권12호
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    • pp.2642-2648
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    • 2010
  • 본 논문은 해상용 VHF 디지털 모뎀의 구성요소 중 하나인 방향성 결합기 및 정류회로의 설계에 관한 것이다. 모뎀을 통해 송신되는 전력을 모니터링하기 위해, 송신 신호의 일부를 추출하는 방향성 결합기와, 결합된 RF 신호에 비례하는 DC 전압을 만들어내는 정류회로를 설계 제작하였다. 160 MHz 대역에서 25 dB 이상의 지향성을 갖는 평행 결합 선로 결합기를 구현하여, 모뎀 송신 전력이 1 W ~ 25 W로 변할 때 정류회로의 출력 전압이 약 0.85 V ~ 1.6 V로 선형적으로 변하는 것을 확인하였다. 제안된 결합기 및 정류회로는 해상용 VHF 디지털 모뎀에 유용하게 사용될 것으로 기대된다.

실시간 전력계통 시뮬레이터를 이용한 보호계전모델 개발 (Implementation and Verification of Distance Relay Models for Real Time Digital Simulator)

  • 이주훈;윤용범;차승태;이진;최종웅
    • 대한전기학회논문지:전력기술부문A
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    • 제52권7호
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    • pp.393-400
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    • 2003
  • This paper discusses how to implement and verify a software model of the digital relay that can be added to real time digital simulator(RTDS) model library and is then subjected to the same outputs as the actual relay. The software model is stand-alone and can be used with real relays. It is also possible to conduct interactive real-time tests when the system effects of the relay action need to be investigated. The characteristics of mho type and the quadrilateral type, which is commonly used in recently developed relays, are modeled in this paper. Single circuit line and double circuit line system are used for model verification. The transmission lines are each 100 km in length and are modeled as distributed parameter lines but not frequency dependent. The transmission lines in the single circuit system are modeled as ideally transposed line. The mutual coupling data with the parallel line was taken account in the transmission lines for the double circuit system. The main CTs and PTs are included and operated in their linear region during the tests. For the purpose of testing the relay model accuracy the faults have been applied at various points on the protected line. Its accuracy is assessed against theoretical values.

Improved Charge Pump Power Factor Correction Electronic Ballast Based on Class DE Inverter

  • Thongkullaphat, Sarayoot
    • International journal of advanced smart convergence
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    • 제4권1호
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    • pp.64-70
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    • 2015
  • This paper proposes fluorescent electronic ballast with high power factor and low line input current harmonics. The system performance can be improved by a charged pump circuit. Details of design and circuit operation are described. The proposed electronic ballast is modified from single-stage half bridge class D electronic ballast by adding capacitor parallel with each power switch and setting the circuit parameter to operate under class DE inverter condition. By using this proposed method the DC bus voltage can be reduced around by 50% compare with conventional class D inverter circuit. Because the power switches are operated at zero voltage switching condition and low dv/dt of class DE switching. The experimental results show that the proper frequency of the prototype is around 50 kHz with input power factor of 0.982, $THD_i$ 10.2% at full load and efficiency of more than 90%.

고온 초전도 자속흐름 트랜지스터에 적용된 전자냉각 특성 시뮬레이션 (Characteristics Simulation of Electronics Cooling for a High-Temperature Superconducting Flux Flow Transistor Circuit)

  • 고석철;강형곤;임성훈;두호익;이종화;한병성
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 하계학술대회 논문집 Vol.3 No.2
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    • pp.1063-1066
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    • 2002
  • An equivalent circuit for the superconductor flux flow transistor(SFFT) was combined with high temperature cooling device, based on the analogy between thermal and electrical variables using the high-temperature superconductor(HTS), is proposed. The device is composed of parallel weak links with a nearby magnetic control line. A model has been developed that is based on solving the equation of motion of Abrikosov vortices subject to Lorentz viscous and pinning forces as well as magnetic surface barriers. The use of thermal models the global performance of thermal cooling circuit and signal system to be checked by using electrical circuit analysis programs such as SPICE.

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On-line 테스팅을 위한 새로운 내장형 전류 감지 회로의 설계 (Design of New Built-ln Current Sensor for On-Line Testing)

  • 곽철호;김정범
    • 대한전자공학회논문지SD
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    • 제38권7호
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    • pp.493-502
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    • 2001
  • 기존의 논리 테스팅에 비하여 여러 가지 장점을 가지는 전류 테스팅을 위하여 새로운 내장형 전류 감지 회로를 설계하였다. 본 논문에서 제안된 내장형 전류 감지 회로는 시험 대상 회로에서 발생하는 전류와 인버터의 전류 발생 특성에 의해 복사되어진 전류를 비교함으로서 시험 대상 회로의 고장 존재 여부를 감지하여 Pass/Fail 신호로 발생시킨다. 설계된 회로는 차동 증폭 형태의 증폭기와 비교기로 이루어져 있으며, 시험 대상 회로의 전류를 복사해 내기 위한 인버터를 포함하고 있어서 총 10개의 트랜지스터와 3개의 인버터를 사용한다. 본 논문에서 제안된 내장형 전류 감지 회로는 고장 테스트를 위하여 별도의 클럭을 사용하지 않는다. 또한 모드 선택이 필요하지 않아 on-line 테스팅이 가능하며, Pass/Fail 신호를 칩의 외부로 전달하는 출력단자 하나를 제외하고는 별도의 제어단자가 필요하지 않은 장점을 가진다. HSPICE를 사용한 컴퓨터 모의 실험을 통하여 시험 대상 회로에 삽입된 고장을 정확하게 검출해 낼 수 있음을 확인하였다. 제안된 내장형 전류 감지 회로가 칩의 전체 면적에서 차지하는 면적소모는 8×8 병렬 승산기를 시험 대상 회로로 사용한 경우에 약 4.34 %로 매우 작아서 내장형 전류 감지회로에 의한 면적 소모에 대한 부담은 거의 없는 것으로 측정되었다.

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